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TXS0104V

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Four-bit bidirectional level shifter for open-drain and push-pull applications

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Data sheet

TXS0104V

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Data sheet Order now

Product details

Technology family TXS Applications I2C, MDIO, SMBus, SPIO Bits (#) 4 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Automotive, Catalog Operating temperature range (°C) -40 to 85
Technology family TXS Applications I2C, MDIO, SMBus, SPIO Bits (#) 4 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Automotive, Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 14 51.9 mm² 8.65 x 6 UQFN (RUT) 12 3.4 mm² 2 x 1.7 VQFN (RGY) 14 12.25 mm² 3.5 x 3.5 WQFN (BQA) 14 7.5 mm² 3 x 2.5
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • 1.65V to 3.6V on A port and 2.3V to 5.5V on B port (VCCA ≤ VCCB)
  • No power-supply sequencing required – VCCA or VCCB can be ramped first
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2000V Human-Body Model (A114-B)
      • 500V Charged-Device Model (C101)
    • B port:
      • 5000V Human-Body Model (A114-B)
      • 500V Charged-Device Model (C101)
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • 1.65V to 3.6V on A port and 2.3V to 5.5V on B port (VCCA ≤ VCCB)
  • No power-supply sequencing required – VCCA or VCCB can be ramped first
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2000V Human-Body Model (A114-B)
      • 500V Charged-Device Model (C101)
    • B port:
      • 5000V Human-Body Model (A114-B)
      • 500V Charged-Device Model (C101)

This 4-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65V to 3.6V. VCCA must be less than or equal to VCCB. The B port is designed to track VCCB. VCCB accepts any supply voltage from 2.3V to 5.5V. This allows for low-voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104V is designed so that the OE input circuit is supplied by VCCA.

For the high-impedance state during power up or power down, tie OE to GND through a pull-down resistor; the current-sourcing capability of the driver determines the minimum value of the resistor.

This 4-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65V to 3.6V. VCCA must be less than or equal to VCCB. The B port is designed to track VCCB. VCCB accepts any supply voltage from 2.3V to 5.5V. This allows for low-voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104V is designed so that the OE input circuit is supplied by VCCA.

For the high-impedance state during power up or power down, tie OE to GND through a pull-down resistor; the current-sourcing capability of the driver determines the minimum value of the resistor.
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* Data sheet TXS0104V 4-Bit Bi-directional, Level-Shifting, Voltage Translator for Open-Drain and Push-Pull Applications datasheet PDF | HTML 14 Jun 2024

Design & development

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Evaluation board

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The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Not available on TI.com
Reference designs

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The TIDA-00403 reference design uses off-the-shelf EVMs for ultrasonic distance measurement solutions using algorithms within the TLV320AIC3268 miniDSP. In conjunction with TI’s PurePath Studio design suite, a robust and user configurable ultrasonic distance measurement system can be designed (...)
Design guide: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
SOIC (D) 14 Ultra Librarian
UQFN (RUT) 12 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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