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UCC27512
4-A/8-A single-channel gate driver with 5-V UVLO and split outputs in SON package
Data sheet
UCC27512
- Low-Cost Gate-Driver Device Offering Superior
Replacement of NPN and PNP Discrete Solutions - 4-A Peak Source and 8-A Peak Sink Asymmetrical
Drive - Strong Sink Current Offers Enhanced Immunity
Against Miller Turnon - Split Output Configuration (Allows Easy and
Independent Adjustment of Turnon and Turnoff
Speeds) in the UCC27511 Saves 1 Diode - Fast Propagation Delays (13-ns Typical)
- Fast Rise and Fall Times (9-ns and 7-ns Typical)
- 4.5-V to 18-V Single Supply Range
- Outputs Held Low During VDD UVLO (Ensures
Glitch-Free Operation at Power Up and Power
Down) - TTL and CMOS Compatible Input-Logic Threshold
(Independent of Supply Voltage) - Hysteretic-Logic Thresholds for High-Noise
Immunity - Dual-Input Design (Choice of an Inverting
(IN– Pin) or Noninverting (IN+ Pin)
Driver Configuration)- Unused Input Pin can be Used for Enable or
Disable Function
- Unused Input Pin can be Used for Enable or
- Output Held Low When Input Pins Are Floating
- Input Pin Absolute Maximum Voltage Levels Not
Restricted by VDD Pin Bias Supply Voltage - Operating Temperature Range of –40°C
to 140°C - 6-Pin DBV (SOT-23) and 6-Pin DRS (3-mm ×
3-mm WSON With Exposed Thermal Pad) Package
Options
The UCC27511 and UCC27512 single-channel, high-speed, low-side gate-driver device can effectively drive MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC27511 and UCC27512 are capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay, typically 13 ns.
UCC27511 features a dual-input design which offers flexibility of implementing both inverting (IN– pin) and noninverting (IN+ pin) configuration with the same device. Either IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.
The input pin threshold of the UCC27511 device is based on TTL and CMOS-compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.
The UCC27511 and UCC27512 provides 4-A source, 8-A sink (asymmetrical drive) peak-drive current capability. Strong sink capability in asymmetrical drive boosts immunity against parasitic, Miller turnon effect. The UCC27511 device also features a unique split output configuration where the gate-drive current is sourced through OUTH pin and sunk through OUTL pin. This unique pin arrangement allows the user to apply independent turnon and turnoff resistors to the OUTH and OUTL pins respectively and easily control the switching slew rates.
UCC27511 and UCC27512 are designed to operate over a wide VDD range of 4.5 to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power-semiconductor devices.
Technical documentation
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View all 9 | Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | UCC2751x Single-Channel, High-Speed, Low-Side Gate Driver (With 4-A Peak Source and 8-A Peak Sink) datasheet (Rev. F) | PDF | HTML | 09 Dec 2013 |
| Application note | Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs | PDF | HTML | 22 Jan 2024 | |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 28 Feb 2020 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 28 Feb 2020 | ||
| Application brief | How to overcome negative voltage transients on low-side gate drivers' inputs | 18 Jan 2019 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 29 Oct 2018 | ||
| Application brief | Enable Function with Unused Differential Input | 11 Jul 2018 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 25 Jun 2018 | ||
| Application brief | Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole | 16 Mar 2018 |
Design & development
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Simulation model
UCC27512 TINA-TI Transient Reference Design
SLUM441.TSC (74 KB) - TINA-TI Reference Design
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| WSON (DRS) | 6 | Ultra Librarian |
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