CD4078B

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CMOS-NOR/OR-Gatter mit 8 Eingängen

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Datenblatt

document-pdfAcrobat CD4078B TYPES datasheet (Rev. C) (Englisch)

CD4078B

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Technology family

CD4000

Supply voltage (min) (V)

Supply voltage (max) (V)

Number of channels

Inputs per channel

IOL (max) (mA)

6.8

IOH (max) (mA)

-6.8

Input type

Standard CMOS

Output type

Push-Pull

Features

Standard speed (tpd > 50ns)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-55 to 125

Technology family

CD4000

Supply voltage (min) (V)

Supply voltage (max) (V)

Number of channels

Inputs per channel

IOL (max) (mA)

6.8

IOH (max) (mA)

-6.8

Input type

Standard CMOS

Output type

Push-Pull

Features

Standard speed (tpd > 50ns)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-55 to 125

PDIP (N)

181.42 mm² 19.3 x 9.4

SOIC (D)

51.9 mm² 8.65 x 6

SOP (NS)

79.56 mm² 10.2 x 7.8

TSSOP (PW)

32 mm² 5 x 6.4

Medium-Speed Operation:
t_PHL, t_PLH = 75 ns (typ.) at V_DD = 10 V
Buffered inputs and output
5-V, 10-V, and 15-V parametric ratings
Standardized symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 28 V over full package-temperature range:
100 nA at 18 V and 25°C
Noise margin (over full package-temperature range):
- 1 V at V_DD = 5 V
- 2 V at V_DD = 10 V
- 2.5 V at V_DD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

Medium-Speed Operation:
t_PHL, t_PLH = 75 ns (typ.) at V_DD = 10 V
Buffered inputs and output
5-V, 10-V, and 15-V parametric ratings
Standardized symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 28 V over full package-temperature range:
100 nA at 18 V and 25°C
Noise margin (over full package-temperature range):
- 1 V at V_DD = 5 V
- 2 V at V_DD = 10 V
- 2.5 V at V_DD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

CD4078B NOR/OR Gate provides the system designer with direct implementation of the positive-logic 8-input NOR and OR functions and supplements the existing family of CMOS gates.

The CD4078B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shink small-outline packages (PW and PWR suffixes).

CD4078B NOR/OR Gate provides the system designer with direct implementation of the positive-logic 8-input NOR and OR functions and supplements the existing family of CMOS gates.

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Alle anzeigen 7

	Typ	Titel	Datum
*	Data sheet	CD4078B TYPES datasheet (Rev. C)	21 Aug 2003
	Selection guide	Logic Guide (Rev. AB)	12 Jun 2017
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	02 Dez 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	16 Jan 2007
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	08 Jul 2004
	User guide	Signal Switch Data Book (Rev. A)	14 Nov 2003
	Application note	Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics	03 Dez 2001

Design und Entwicklung

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Evaluierungsplatine

14-24-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14-polige bis 24-polige D-, DB-, DGV-, DW-, DYY-, NS-

Das 14-24-LOGIC-EVM-Evaluierungsmodul (EVM) ist für die Unterstützung aller Logikgeräte konzipiert, die sich in einem 14-Pin- bis 24-Pin-D-, DW-, DB-, NS-, PW-, DYY- oder DGV-Gehäuse befinden.

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