Startseite Taktgeber & Timing Taktpuffer
Startseite
Taktgeber & Timing
Taktpuffer

CDCVF111

LETZTE KAUFMÖGLICHKEIT

1-9-Differenzial-LVPECL-Takttreiber

Jetzt bestellen
Datenblatt

CDCVF111

LETZTE KAUFMÖGLICHKEIT
Datenblatt Jetzt bestellen

Produktdetails

Function Differential Output frequency (max) (MHz) 650 Number of outputs 9 Output supply voltage (V) 3.3 Core supply voltage (V) 3.3 Output skew (ps) 50 Features 1:9 fanout Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVPECL Input type LVPECL
Function Differential Output frequency (max) (MHz) 650 Number of outputs 9 Output supply voltage (V) 3.3 Core supply voltage (V) 3.3 Output skew (ps) 50 Features 1:9 fanout Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVPECL Input type LVPECL
PLCC (FN) 28 155.0025 mm² 12.45 x 12.45
  • Low-Output Skew for Clock-Distribution Applications
  • Differential Low-Voltage Pseudo-ECL (LVPECL) Compatible Inputs and Outputs
  • Distributes Differential Clock Inputs to Nine Differential Clock Outputs
  • Output Reference Voltage (VREF) Allows Distribution From a Single-Ended Clock Input
  • Packaged In a 28-Pin Plastic Chip Carrier
  • Low-Output Skew for Clock-Distribution Applications
  • Differential Low-Voltage Pseudo-ECL (LVPECL) Compatible Inputs and Outputs
  • Distributes Differential Clock Inputs to Nine Differential Clock Outputs
  • Output Reference Voltage (VREF) Allows Distribution From a Single-Ended Clock Input
  • Packaged In a 28-Pin Plastic Chip Carrier

The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN, CLKIN)\ to nine pairs of differential clock (Y, Y)\ outputs with minimum skew for clock distribution. It is specifically designed for driving 50- transmission lines.

The VREF output can be strapped to the CLKIN\ input for a single-ended CLKIN input.

The CDCVF111 is characterized for operation from –40°C to 85°C.

The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN, CLKIN)\ to nine pairs of differential clock (Y, Y)\ outputs with minimum skew for clock distribution. It is specifically designed for driving 50- transmission lines.

The VREF output can be strapped to the CLKIN\ input for a single-ended CLKIN input.

The CDCVF111 is characterized for operation from –40°C to 85°C.
filter Andere Taktpuffer suchen
Herunterladen

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 1
Typ Titel Datum
* Data sheet 1:9 Differential LVPECL Clock Driver datasheet (Rev. B) 07 Jun 2002

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort