Produktdetails

Number of full bridges 1/2 Vs (min) (V) 4.5 Vs ABS (max) (V) 40 Sleep current (µA) 2.5 Control mode PWM Control interface Hardware (GPIO), SPI Features Inline Current sense Amplifier, Smart Gate Drive Rating Automotive Operating temperature range (°C) -40 to 125
Number of full bridges 1/2 Vs (min) (V) 4.5 Vs ABS (max) (V) 40 Sleep current (µA) 2.5 Control mode PWM Control interface Hardware (GPIO), SPI Features Inline Current sense Amplifier, Smart Gate Drive Rating Automotive Operating temperature range (°C) -40 to 125
VQFN (RHB) 32 25 mm² 5 x 5
  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Half-bridge smart gate driver
    • 4.9-V to 37-V (40-V abs. max) operating range
    • Doubler charge pump for 100% PWM
  • Pin to pin gate driver variants
  • Smart gate drive architecture
    • Adjustable slew rate control
    • 0.5-mA to 62-mA peak source current output
    • 0.5-mA to 62-mA peak sink current output
    • Integrated dead-time handshaking
  • Wide common mode current shunt amplifier
    • Supports inline, high-side, or low-side
    • Adjustable gain settings (10, 20, 40, 80 V/V)
    • Integrated feedback resistors
    • Adjustable PWM blanking scheme
  • Multiple interface options available
    • SPI: Detailed configuration and diagnostics
    • H/W: Simplified control and less MCU pins
  • Spread spectrum clocking for EMI reduction
  • Compact VQFN package with wettable flanks
  • Integrated protection features
    • Dedicated driver disable pin (DRVOFF)
    • Supply and regulator voltage monitors
    • MOSFET VDS overcurrent monitors
    • MOSFET VGS gate fault monitors
    • Charge pump for reverse polarity MOSFET
    • Offline open load and short circuit diagnostics
    • Device thermal warning and shutdown
    • Fault condition interrupt pin (nFAULT)
  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Half-bridge smart gate driver
    • 4.9-V to 37-V (40-V abs. max) operating range
    • Doubler charge pump for 100% PWM
  • Pin to pin gate driver variants
  • Smart gate drive architecture
    • Adjustable slew rate control
    • 0.5-mA to 62-mA peak source current output
    • 0.5-mA to 62-mA peak sink current output
    • Integrated dead-time handshaking
  • Wide common mode current shunt amplifier
    • Supports inline, high-side, or low-side
    • Adjustable gain settings (10, 20, 40, 80 V/V)
    • Integrated feedback resistors
    • Adjustable PWM blanking scheme
  • Multiple interface options available
    • SPI: Detailed configuration and diagnostics
    • H/W: Simplified control and less MCU pins
  • Spread spectrum clocking for EMI reduction
  • Compact VQFN package with wettable flanks
  • Integrated protection features
    • Dedicated driver disable pin (DRVOFF)
    • Supply and regulator voltage monitors
    • MOSFET VDS overcurrent monitors
    • MOSFET VGS gate fault monitors
    • Charge pump for reverse polarity MOSFET
    • Offline open load and short circuit diagnostics
    • Device thermal warning and shutdown
    • Fault condition interrupt pin (nFAULT)

The DRV8106-Q1 is a highly integrated half-bridge gate driver, capable of driving high-side and low-side N-channel power MOSFETs. It generates the proper gate drive voltages using an integrated doubler charge pump for the high-side and a linear regulator for the low-side.

The device uses a smart gate drive architecture to reduce system cost and improve reliability. The gate driver optimizes dead time to avoid shoot-through conditions, provides control to decreasing electromagnetic interference (EMI) through adjustable gate drive current, and protects against drain to source and gate short conditions with VDS and VGS monitors.

A wide common mode shunt amplifier provides inline current sensing to continuously measure motor current even during recirculating windows. The amplifier can be used in low-side or high-side sense configurations if inline sensing is not required.

The DRV8106-Q1 provide an array of protection features to ensure robust system operation. These include under and overvoltage monitors for the power supply and charge pump, VDS overcurrent and VGS gate fault monitors for the external MOSFETs, offline open load and short circuit diagnostics, and internal thermal warning and shutdown protection.

The DRV8106-Q1 is a highly integrated half-bridge gate driver, capable of driving high-side and low-side N-channel power MOSFETs. It generates the proper gate drive voltages using an integrated doubler charge pump for the high-side and a linear regulator for the low-side.

The device uses a smart gate drive architecture to reduce system cost and improve reliability. The gate driver optimizes dead time to avoid shoot-through conditions, provides control to decreasing electromagnetic interference (EMI) through adjustable gate drive current, and protects against drain to source and gate short conditions with VDS and VGS monitors.

A wide common mode shunt amplifier provides inline current sensing to continuously measure motor current even during recirculating windows. The amplifier can be used in low-side or high-side sense configurations if inline sensing is not required.

The DRV8106-Q1 provide an array of protection features to ensure robust system operation. These include under and overvoltage monitors for the power supply and charge pump, VDS overcurrent and VGS gate fault monitors for the external MOSFETs, offline open load and short circuit diagnostics, and internal thermal warning and shutdown protection.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet DRV8106-Q1 Automotive Half-Bridge Smart Gate Driver With Wide Common Mode Inline Current Sense Amplifier datasheet (Rev. B) PDF | HTML 05 Apr 2021
Application note Daisy Chain Implementation for Serial Peripheral Interface (Rev. A) 07 Apr 2021
Application note Understanding Smart Gate Drive (Rev. D) 01 Mär 2021
Technical article How analog integration simplifies automotive body motor controller designs PDF | HTML 23 Okt 2020
Application brief Benefits of a Wide Common Mode, Differential Current Shunt Amplifier PDF | HTML 08 Sep 2020
Application note Detecting Short to Battery and Ground Conditions with TI Motor Gate Drivers PDF | HTML 29 Mai 2020
White paper Smart Gate Drive 02 Jul 2019
Application note Protecting Automotive Motor Drive Systems from Reverse Polarity Conditions (Rev. A) 19 Feb 2019
Application note Cut-Off Switch in High-Current Motor-Drive Applications (Rev. A) 20 Aug 2018
Application note Relay Replacement for Brushed DC Motor Drive in Automotive Applications 14 Nov 2016

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

DRV8106H-Q1EVM — Halbbrücken-Smart-Gate-Treiber für den Automobilbereich mit Strommessverstärker mit großem Gleichtak

Das DRV8106H-Q1EVM wurde entwickelt, um den DRV8106H-Q1 zu evaluieren, einen integrierten Treiber für bürstenbehaftete Gleichstrommotoren, der für den Automobilbereich qualifiziert ist. Der DRV8106H-Q1nbsp;ist ein hochintegrierter Halbbrücken-Gate-Treiber, der High-Side- und (...)

Benutzerhandbuch: PDF
Evaluierungsplatine

DRV8106S-Q1EVM — EVM für Halbbrücken-Smart-Gate-Treiber für den Automobilbereich mit Strommessverstärker mit breit

Das DRV8106S-Q1EVM wurde entwickelt, um den DRV8106S-Q1 zu evaluieren, einen integrierten Treiber für bürstenbehaftete Gleichstrommotoren, der für den Automobilbereich qualifiziert ist. Der DRV8106S-Q1nbsp;ist ein hochintegrierter Halbbrücken-Gate-Treiber, der High-Side- und (...)

Benutzerhandbuch: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
VQFN (RHB) 32 Ultra Librarian

Bestellen & Qualität

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  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

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