Startseite Energiemanagement Gate-Treiber Low-Side-Treiber

LM5111

AKTIV

5-A/3-A-Zweikanal-Gate-Treiber mit Active-High- oder Active-Low-Ausgang 4-V-UVLO

Produktdetails

Number of channels 2 Power switch MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 3.5 Input supply voltage (max) (V) 14 Features UVLO Configured to Drive PFET through OUT_A Operating temperature range (°C) -40 to 125 Rise time (ns) 14 Fall time (ns) 12 Propagation delay time (µs) 0.025 Input threshold TTL Channel input logic Combination, Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 3 Driver configuration Dual, Independent
Number of channels 2 Power switch MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 3.5 Input supply voltage (max) (V) 14 Features UVLO Configured to Drive PFET through OUT_A Operating temperature range (°C) -40 to 125 Rise time (ns) 14 Fall time (ns) 12 Propagation delay time (µs) 0.025 Input threshold TTL Channel input logic Combination, Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 3 Driver configuration Dual, Independent
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 SOIC (D) 8 29.4 mm² 4.9 x 6
  • Independently Drives Two N-Channel MOSFETs
  • Compound CMOS and Bipolar Outputs Reduce Output Current Variation
  • 5-A Sink and 3-A Source Current Capability
  • Two Channels can be Connected in Parallel to Double the Drive Current
  • Independent Inputs (TTL Compatible)
  • Fast Propagation Times (25 ns Typical)
  • Fast Rise and Fall Times (14 ns and 12 ns Rise and Fall, Respectively, With 2-nF Load)
  • Available in Dual Noninverting, Dual Inverting and Combination Configurations
  • Supply Rail Undervoltage Lockout Protection (UVLO)ƒ
  • LM5111-4 UVLO Configured to Drive PFET through OUT_A and NFET through OUT_B
  • Pin Compatible With Industry Standard Gate Drivers
  • Independently Drives Two N-Channel MOSFETs
  • Compound CMOS and Bipolar Outputs Reduce Output Current Variation
  • 5-A Sink and 3-A Source Current Capability
  • Two Channels can be Connected in Parallel to Double the Drive Current
  • Independent Inputs (TTL Compatible)
  • Fast Propagation Times (25 ns Typical)
  • Fast Rise and Fall Times (14 ns and 12 ns Rise and Fall, Respectively, With 2-nF Load)
  • Available in Dual Noninverting, Dual Inverting and Combination Configurations
  • Supply Rail Undervoltage Lockout Protection (UVLO)ƒ
  • LM5111-4 UVLO Configured to Drive PFET through OUT_A and NFET through OUT_B
  • Pin Compatible With Industry Standard Gate Drivers

The LM5111 Dual Gate Driver replaces industry standard gate drivers with improved peak output current and efficiency. Each compound output driver stage includes MOS and bipolar transistors operating in parallel that together sink more than 5-A peak from capacitive loads. Combining the unique characteristics of MOS and bipolar devices reduces drive current variation with voltage and temperature. Undervoltage lockout protection is also provided. The drivers can be operated in parallel with inputs and outputs connected to double the drive current capability. This device is available in the SOIC package or the thermally enhanced
MSOP-PowerPAD package.

The LM5111 Dual Gate Driver replaces industry standard gate drivers with improved peak output current and efficiency. Each compound output driver stage includes MOS and bipolar transistors operating in parallel that together sink more than 5-A peak from capacitive loads. Combining the unique characteristics of MOS and bipolar devices reduces drive current variation with voltage and temperature. Undervoltage lockout protection is also provided. The drivers can be operated in parallel with inputs and outputs connected to double the drive current capability. This device is available in the SOIC package or the thermally enhanced
MSOP-PowerPAD package.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet LM5111 Dual 5-A Compound Gate Driver datasheet (Rev. H) PDF | HTML 28 Sep 2016
Application note Why use a Gate Drive Transformer? PDF | HTML 04 Mär 2024
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22 Jan 2024
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
Application note Improving Efficiency of DC-DC Conversion through Layout 07 Mai 2019
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18 Jan 2019
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Okt 2018
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018
EVM User's guide AN-1937 LM3433 10A to 40A LED Driver Evaluation Board (Rev. D) 03 Mai 2013

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Bestellen & Qualität

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