SN74AHCT1G86

Name: SN74AHCT1G86
Brand: TI
SKU: SN74AHCT1G86
Price: 0.026 USD

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Einfaches XOR-Gatter mit 2 Eingängen, 4,5 V bis 5,5 V (Exklusiv-ODER) mit TTL-kompatiblen CMOS-Eingä

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Datenblatt

document-pdfAcrobat SN74AHCT1G86 Single 2-Input Exclusive-OR Gate datasheet (Rev. P) (Englisch) PDF | HTML

SN74AHCT1G86

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Datenblatt

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Produktdetails

Technology family

AHCT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Number of channels

Inputs per channel

IOL (max) (mA)

Input type

TTL-Compatible CMOS

IOH (max) (mA)

-8

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

AHCT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Number of channels

Inputs per channel

IOL (max) (mA)

Input type

TTL-Compatible CMOS

IOH (max) (mA)

-8

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

SOT-23 (DBV)

8.12 mm² 2.9 x 2.8

SOT-SC70 (DCK)

4.2 mm² 2 x 2.1

Operating range of 4.5V to 5.5V
Max tpd of 8ns at 5V
Low power consumption, 10A maximum ICC
8mA output drive at 5V
Inputs are TTL-voltage compatible
Latch-up performance exceeds 250mA per JESD 17

Operating range of 4.5V to 5.5V
Max tpd of 8ns at 5V
Low power consumption, 10A maximum ICC
8mA output drive at 5V
Inputs are TTL-voltage compatible
Latch-up performance exceeds 250mA per JESD 17

The SN74AHCT1G86 is a single 2-input exclusive-OR gate. The device performs the Boolean function Y = A ⊕ B or Y = AB + A B in positive logic.

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Andere XOR-Gatter (Exklusives OR) suchen

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Technische Dokumentation

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Alle anzeigen 19

	Typ	Titel		Datum
*	Data sheet	SN74AHCT1G86 Single 2-Input Exclusive-OR Gate datasheet (Rev. P)	PDF \| HTML	07 Feb 2024
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		26 Jul 2021
	Selection guide	Little Logic Guide 2018 (Rev. G)		06 Jul 2018
	Selection guide	Logic Guide (Rev. AB)		12 Jun 2017
	Application note	How to Select Little Logic (Rev. A)		26 Jul 2016
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		02 Dez 2015
	User guide	LOGIC Pocket Data Book (Rev. B)		16 Jan 2007
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		04 Nov 2004
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		08 Jul 2004
	Application note	Selecting the Right Level Translation Solution (Rev. A)		22 Jun 2004
	Application note	Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)		02 Dez 2002
	Application note	Texas Instruments Little Logic Application Report		01 Nov 2002
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		29 Aug 2002
	Design guide	AHC/AHCT Designer's Guide February 2000 (Rev. D)		24 Feb 2000
	Product overview	Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)		01 Apr 1998
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices		01 Dez 1997
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)		01 Aug 1997
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		01 Jun 1997
	Application note	Live Insertion		01 Okt 1996

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

5-8-LOGIC-EVM — Generisches Logik-Evaluierungsmodul für 5- bis 8-polige DCK-, DCT-, DCU-, DRL- und DBV-Gehäuse

Flexibles EVM zur Unterstützung aller Geräte mit 5- bis 8-poligem DCK-, DCT-, DCU-, DRL- oder DBV-Gehäuse.

Benutzerhandbuch: PDF

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Simulationsmodell

SN74AHC1G86 IBIS Model

SCLM017.ZIP (7 KB) - IBIS Model

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Simulationsmodell

SN74AHCT1G86 Behavioral SPICE Model

SCLM242.ZIP (7 KB) - PSpice Model

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TIDA-010040 — Referenzdesign für Alarmton-Generator

This reference design provides a way of generating alarms similar to as described in the IEC60601-1-8 standard for medical devices. The critical timing parameters are programmable through firmware. All parameters, including pulse width, pulse rate, internal frequency, pulse rise time, volume (...)

Design guide: PDF

Schaltplan: PDF