SN74AUC2G241

Name: SN74AUC2G241
Brand: TI
SKU: SN74AUC2G241
Price: 0.249 USD

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2-Kanal, 0,8 V bis 2,7 V, Hochgeschwindigkeits-Puffer mit Tri-State-Ausgängen

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Datenblatt

document-pdfAcrobat SN74AUC2G241 datasheet (Rev. C) (Englisch)

SN74AUC2G241

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Datenblatt

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Produktdetails

Technology family

AUC

Supply voltage (min) (V)

0.8

Supply voltage (max) (V)

2.7

Number of channels

2

IOL (max) (mA)

9

Supply current (max) (µA)

10

IOH (max) (mA)

-9

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

AUC

Supply voltage (min) (V)

0.8

Supply voltage (max) (V)

2.7

Number of channels

2

IOL (max) (mA)

9

Supply current (max) (µA)

10

IOH (max) (mA)

-9

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

DSBGA (YZP)

8

2.8125 mm² 2.25 x 1.25

SSOP (DCT)

8

11.8 mm² 2.95 x 4

VSSOP (DCU)

8

6.2 mm² 2 x 3.1

Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 1.9 ns at 1.8 V
Low Power Consumption, 10 µA at 1.8 V
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

NanoFree is a trademark of Texas Instruments.

Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 1.9 ns at 1.8 V
Low Power Consumption, 10 µA at 1.8 V
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

NanoFree is a trademark of Texas Instruments.

This dual buffer/driver is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC2G241 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device is organized as two 1-bit line drivers with separate output-enable (1OE, 2OE) inputs. When 1OE is low or 2OE is high, the device passes data from the A inputs to the Y outputs. When 1OE is high or 2OE is low, the outputs are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor, and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.

This dual buffer/driver is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC2G241 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device is organized as two 1-bit line drivers with separate output-enable (1OE, 2OE) inputs. When 1OE is low or 2OE is high, the device passes data from the A inputs to the Y outputs. When 1OE is high or 2OE is low, the outputs are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor, and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.

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Alle anzeigen 17

	Typ	Titel	Datum
*	Data sheet	SN74AUC2G241 datasheet (Rev. C)	12 Jan 2007
	Selection guide	Little Logic Guide 2018 (Rev. G)	06 Jul 2018
	Selection guide	Logic Guide (Rev. AB)	12 Jun 2017
	Application note	How to Select Little Logic (Rev. A)	26 Jul 2016
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	02 Dez 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	16 Jan 2007
	Product overview	Design Summary for WCSP Little Logic (Rev. B)	04 Nov 2004
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	08 Jul 2004
	Application note	Selecting the Right Level Translation Solution (Rev. A)	22 Jun 2004
	User guide	Signal Switch Data Book (Rev. A)	14 Nov 2003
	Application note	Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices	21 Mär 2003
	User guide	AUC Data Book, January 2003 (Rev. A)	01 Jan 2003
	Application note	Texas Instruments Little Logic Application Report	01 Nov 2002
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	29 Aug 2002
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards	13 Jun 2002
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS	27 Mär 2002
	More literature	AUC Product Brochure (Rev. A)	18 Mär 2002

Design und Entwicklung

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Benutzerhandbuch: PDF

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Simulationsmodell

SN74AUC2G241 Behavioral SPICE Model

SCEM707.ZIP (7 KB) - PSpice Model

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Simulationsmodell

SN74AUC2G241 IBIS Model (Rev. A)

SCEM391A.ZIP (72 KB) - IBIS Model

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Gehäuse	Pins	CAD-Symbole, Footprints und 3D-Modelle
DSBGA (YZP)	8	Ultra Librarian
SSOP (DCT)	8	Ultra Librarian
VSSOP (DCU)	8	Ultra Librarian

Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

SN74AUC2G241

2-Kanal, 0,8 V bis 2,7 V, Hochgeschwindigkeits-Puffer mit Tri-State-Ausgängen

SN74AUC2G241

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SN74AUC2G241 Behavioral SPICE Model

SN74AUC2G241 IBIS Model (Rev. A)

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