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Universal-Transceiver

SN74LVTH16245A-Q1

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Bus-Transceiver, Auto-Produktkatalog, 3,3 V, ABT, 16 Bit, mit Tri-State-Ausgängen

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Datenblatt

SN74LVTH16245A-Q1

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Produktdetails

Supply voltage (min) (V) 2.7 Supply voltage (max) (V) 3.6 Number of channels 16 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type TTL/CMOS Output type LVTTL Features Balanced outputs Technology family LVT Rating Automotive Operating temperature range (°C) -40 to 125
Supply voltage (min) (V) 2.7 Supply voltage (max) (V) 3.6 Number of channels 16 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type TTL/CMOS Output type LVTTL Features Balanced outputs Technology family LVT Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (DGG) 48 101.25 mm² 12.5 x 8.1
  • Qualified for Automotive Applications
  • Member of the Texas Instruments Widebus™ Family
  • State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
  • Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Supports Unregulated Battery Operation Down To 2.7 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • Qualified for Automotive Applications
  • Member of the Texas Instruments Widebus™ Family
  • State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
  • Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Supports Unregulated Battery Operation Down To 2.7 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17

The SN74LVTH16245A is a 16-bit (dual-octal) noninverting 3-state transceiver designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the devices so that the buses are isolated.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with bus-hold circuitry is not recommended.

The SN74LVTH16245A is a 16-bit (dual-octal) noninverting 3-state transceiver designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the devices so that the buses are isolated.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with bus-hold circuitry is not recommended.
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Technische Dokumentation

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Typ Titel Datum
* Data sheet 3.3-V ABT 16-Bit Bus Transceiver With 3-State Outputs datasheet (Rev. C) 18 Jan 2008
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dez 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 Mai 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 10 Mai 2002
Selection guide Advanced Bus Interface Logic Selection Guide 09 Jan 2001
Application note LVT-to-LVTH Conversion 08 Dez 1998
Application note LVT Family Characteristics (Rev. A) 01 Mär 1998
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Okt 1996
Application note Live Insertion 01 Okt 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 Mai 1996

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