These quad differential receivers accept digital data over balanced transmission lines. They translate differential input logic levels to TTL output logic levels.
The TB5R1 is a pin- and function-compatible replacement for the Agere systems BRF1A and BRF2A; it includes 3-kV HBM and 2-kV CDM ESD protection.
The TB5R2 is a pin- and function-compatible replacement for the Agere systems BRS2A and BRS2B and incorporates a 125-mV receiver input offset, preferred state output, 3-kV HBM and 2-kV CDM ESD protection. The TB5R2 preferred state feature places the high state when the inputs are open, shorted to ground, or shorted to the power supply.
The power-down loading characteristics of the receiver input
circuit are approximately 8 k relative to the power supplies; hence
they do not load the transmission line when the circuit is powered down.
The packaging for these differential line receivers include a 16-pin gull wing SOIC (DW) and SOIC (D).
The enable inputs of this device include internal pullup
resistors of approximately 40 k that are connected to VCC to ensure a logical high level input if the inputs
are open circuited.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | TB5R1,TB5R2, Quad Differential PECL Receivers datasheet (Rev. C) | 18 Jan 2008 |
Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
| SOIC (DW) | 16 | Ultra Librarian |
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