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Ethernet retimers, redrivers & mux-buffers

DS125DF410

ACTIVE

9.8 to 12.5-Gbps quad channel retimer with adaptive EQ, CDR and DFE

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Data sheet

DS125DF410

ACTIVE
Data sheet Order now

Product details

Type Retimer Number of channels 4 Input compatibility AC-coupling, CML Speed (max) (Gbpp) 12.5 Protocols 10G-SR/LR, 40G-SR4/LR4, CPRI, General purpose, Infiniband, Interlaken Operating temperature range (°C) -40 to 85
Type Retimer Number of channels 4 Input compatibility AC-coupling, CML Speed (max) (Gbpp) 12.5 Protocols 10G-SR/LR, 40G-SR4/LR4, CPRI, General purpose, Infiniband, Interlaken Operating temperature range (°C) -40 to 85
WQFN (RHS) 48 49 mm² 7 x 7
  • Each Channel Independently Locks to Data Rates from 9.8 to 12.5 Gbps and Submultiples
  • Fast Lock Operation Based on Protocol-Select Mode
  • Low Latency (~300ps)
  • Adaptive Equalization up to 34-dB Boost at 5 GHz
  • Adjustable Transmit VOD: 600 to 1300 mVp-p
  • Adjustable Transmit De-emphasis to –15 dB
  • Typical Power Dissipation (EQ+DFE+CDR+DE): 180 mW/Channel
  • Programmable Output Polarity Inversion
  • Input Signal Detection, CDR Lock Detection/Indicator
  • On-Chip Eye Monitor (EOM), PRBS Generator
  • Single 2.5-V ± 5% Power Supply
  • SMBus/EEPROM Configuration Modes
  • Operating Temperature Range of –40 to 85°C
  • WQFN 48-Pin 7-mm x 7-mm Package
  • Easy Pin Compatible Upgrade Between Repeater and Retimers
    • DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
    • DS100DF410 (EQ+DFE+CDR+DE): 10.3125 Gbps
    • DS110RT410 (EQ+CDR+DE): 8.5–11.3 Gbps
    • DS110DF410 (EQ+DFE+CDR+DE): 8.5–11.3 Gbps
    • DS125RT410 (EQ+CDR+DE): 9.8–12.5 Gbps
    • DS125DF410 (EQ+DFE+CDR+DE): 9.8–12.5 Gbps
    • DS100BR410 (EQ+DE): Up to 10.3125 Gbps
  • Each Channel Independently Locks to Data Rates from 9.8 to 12.5 Gbps and Submultiples
  • Fast Lock Operation Based on Protocol-Select Mode
  • Low Latency (~300ps)
  • Adaptive Equalization up to 34-dB Boost at 5 GHz
  • Adjustable Transmit VOD: 600 to 1300 mVp-p
  • Adjustable Transmit De-emphasis to –15 dB
  • Typical Power Dissipation (EQ+DFE+CDR+DE): 180 mW/Channel
  • Programmable Output Polarity Inversion
  • Input Signal Detection, CDR Lock Detection/Indicator
  • On-Chip Eye Monitor (EOM), PRBS Generator
  • Single 2.5-V ± 5% Power Supply
  • SMBus/EEPROM Configuration Modes
  • Operating Temperature Range of –40 to 85°C
  • WQFN 48-Pin 7-mm x 7-mm Package
  • Easy Pin Compatible Upgrade Between Repeater and Retimers
    • DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
    • DS100DF410 (EQ+DFE+CDR+DE): 10.3125 Gbps
    • DS110RT410 (EQ+CDR+DE): 8.5–11.3 Gbps
    • DS110DF410 (EQ+DFE+CDR+DE): 8.5–11.3 Gbps
    • DS125RT410 (EQ+CDR+DE): 9.8–12.5 Gbps
    • DS125DF410 (EQ+DFE+CDR+DE): 9.8–12.5 Gbps
    • DS100BR410 (EQ+DE): Up to 10.3125 Gbps

The DS125DF410 is four channel retimer with integrated signal conditioning. The device includes a fully adaptive Continuous-Time Linear Equalizer (CTLE), self calibrating 5-tap Decision Feedback Equalizer (DFE), Clock and Data Recovery (CDR), and transmit De-Emphasis (DE) driver to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1×10-15.

Each channel can independently lock to data rate from 9.8 to 12.5 Gbps, and associated sub rates (div by 2, 4 and 8) to support a variety of communication protocols. A 25 MHz crystal oscillator clock is used to speed up the CDR lock process. This clock is not used for training the PLL and does not need to be synchronous with the serial data.

The programmable settings can be applied using the SMBus (I2C) interface, or they can be loaded via an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning.

The DS125DF410 is four channel retimer with integrated signal conditioning. The device includes a fully adaptive Continuous-Time Linear Equalizer (CTLE), self calibrating 5-tap Decision Feedback Equalizer (DFE), Clock and Data Recovery (CDR), and transmit De-Emphasis (DE) driver to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1×10-15.

Each channel can independently lock to data rate from 9.8 to 12.5 Gbps, and associated sub rates (div by 2, 4 and 8) to support a variety of communication protocols. A 25 MHz crystal oscillator clock is used to speed up the CDR lock process. This clock is not used for training the PLL and does not need to be synchronous with the serial data.

The programmable settings can be applied using the SMBus (I2C) interface, or they can be loaded via an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning.
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Technical documentation

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Type Title Date
* Data sheet DS125DF410 Low Power Multi-Rate Quad Channel Retimer datasheet (Rev. H) PDF | HTML 27 Feb 2018
Application note Extend reach with Ethernet Redrivers and Retimers for 10G-12.5G Applications (Rev. A) 31 Jan 2023
Application note Implementing TI Retimers on 10G ZR and DWDM SFP+ Optical Links 08 Apr 2019
Application brief DS110DF111,DS125DF111, DS100DF410, DS110DF410, and DS125DF410 Programming Guide 25 Mar 2019
EVM User's guide DS100DF410EVK, DS110DF410EVK, DS125DF410EVM User's Guide (Rev. C) 22 Jun 2016
Application note Understanding EEPROM Programming for 10G to 12.5G Retimers 13 Jan 2016
Application note Selecting TI SigCon Devices for SFF-8431 SFP+ Applications 06 May 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DS125DF410EVM — DS125DF410EVM: 9.8 to 12.5 Gbps Quad Channel Retimer with Adaptive EQ, CDR and DFE Evaluation Module

The DS125DF410EVM evaluation board lets you examine the advanced signal conditioning capabilities of the DS125DF410 and DS125RT410 devices using SMAs. The board is controlled by a PC using a USB port and the SigCon Architect GUI.

To use the SigCon Architect GUI to control the device, use the  (...)

User guide: PDF
Not available on TI.com
Simulation model

DS125DF410 IBIS-AMI Model Request Form

SNLM150.PDF (25 KB) - IBIS Model
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Simulation model

DS1xxDF410 IBIS-AMI Model (Keysight ADS)

SNLM272.ZIP (7129 KB) - IBIS-AMI Model
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
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WQFN (RHS) 48 Ultra Librarian
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