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The DS26C32A is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.
The DS26C32A has an input sensitivity of 200 mV over the common mode input voltage range of ±7V. The DS26C32A features internal pull-up and pull-down resistors which prevent output oscillation on unused channels.
The DS26C32A provides an enable and disable function common to all four receivers, and features TRI-STATE outputs with 6 mA source and sink capability. This product is pin compatible with the DS26LS32A and the AM26LS32.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | DS26C32AMQML Quad Differential Line Receiver datasheet (Rev. A) | 15 Apr 2013 | |
| * | SMD | DS26C32AMQML SMD 5962-91640 | 21 Jun 2016 | |
| White paper | Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) | PDF | HTML | 30 Apr 2024 | |
| More literature | Die D/S DS26C32A MD8 Quad Differential Line Receiver | 07 Sep 2012 |
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