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TI’s Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is guaranteed over the full range of 5 to 12.5 Gbps. The DS80EP100 requires no power to operate. The equalizer operates anywhere in the data path to minimize media-induced deterministic jitter in both FR4 traces and cable applications. Symmetric I/O structures support full duplex or half duplex applications. Linear compensation is provided independent of line coding or protocol. The device is ideal for both bi-level and multi-level signaling.
The equalizer is available in a 6 pin leadless WSON package with a space saving 2.2 mm X 2.5 mm footprint. This tiny package provides maximum flexibility in placement and routing of the Power-saver equalizer.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | DS80EP100 5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables datasheet (Rev. C) | 19 Feb 2013 |
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| WSON (NGF) | 6 | Ultra Librarian |
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