DS90C032QML

ACTIVE

LVDS quad CMOS differential line receiver

Product details

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 5 Signaling rate (Mbps) 155.5 Input signal LVDS Output signal TTL Rating Military Operating temperature range (°C) -55 to 125
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 5 Signaling rate (Mbps) 155.5 Input signal LVDS Output signal TTL Rating Military Operating temperature range (°C) -55 to 125
LCCC (NAJ) 20 79.0321 mm² 8.89 x 8.89
  • Single Event Latchup (SEL) Immune 120 MeV-cm2/mg
  • High Impedance LVDS Inputs with Power-Off.
  • Accepts Small Swing (330 mV) Differential Signal Levels
  • Low Power Dissipation
  • Low Differential Skew
  • Low Chip to Chip Skew
  • Pin Compatible with DS26C32A
  • Compatible with IEEE 1596.3 SCI LVDS Standard

All trademarks are the property of their respective owners.

  • Single Event Latchup (SEL) Immune 120 MeV-cm2/mg
  • High Impedance LVDS Inputs with Power-Off.
  • Accepts Small Swing (330 mV) Differential Signal Levels
  • Low Power Dissipation
  • Low Differential Skew
  • Low Chip to Chip Skew
  • Pin Compatible with DS26C32A
  • Compatible with IEEE 1596.3 SCI LVDS Standard

All trademarks are the property of their respective owners.

The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90C032 accepts low voltage differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.

The DS90C032 provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

The DS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.

The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90C032 accepts low voltage differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.

The DS90C032 provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

The DS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 8
Type Title Date
* Data sheet DS90C032QML LVDS Quad CMOS Differential Line Receiver datasheet (Rev. D) 12 Apr 2013
* SMD DS90C032QML SMD 5962-95834 21 Jun 2016
* Radiation & reliability report DS90C032xLQMLV SEE Report 09 May 2012
* Radiation & reliability report DS90C032xLQMLV TID Report 09 May 2012
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 Aug 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 May 2018
More literature Die D/S DS90C032 MDR Lvds Quad Cmos Differential Line Receiver 07 Sep 2012
Application note AN-1110 LVDS Quad Dynamic I CC vs Frequency 15 May 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins CAD symbols, footprints & 3D models
LCCC (NAJ) 20 Ultra Librarian

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos