The CD74FCT245 is an octal bus transceiver with 3-state outputs using a small-geometry BiCMOS technology. The output stages are a combination of bipolar and CMOS transistors that limit the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces the power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 64 mA.
The CD74FCT245 allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The CD74FCT245 is characterized for operation from 0°C to 70°C.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | BiCMOS Octal Bus Transceiver With 3-State Outputs datasheet | 02 jul 2000 | |
| Selection guide | Logic Guide (Rev. AB) | 12 jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 dic 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 ene 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 jul 2004 | ||
| Application note | Selecting the Right Level Translation Solution (Rev. A) | 22 jun 2004 | ||
| Selection guide | Advanced Bus Interface Logic Selection Guide | 09 ene 2001 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| PDIP (N) | 20 | Ultra Librarian |
| SOIC (DW) | 20 | Ultra Librarian |
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