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Circuitos integrados lógicos configurables y programables
Multivibrador One-shots

CD74HC221

ACTIVO

Multivibradores monoestables Duales CMOS Logic de alta velocidad con Reset

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CD74HC221

ACTIVO
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Detalles del producto

Number of channels 2 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Technology family HC Input type Standard CMOS Output type Push-Pull Supply current (µA) 80 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Features High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Catalog
Number of channels 2 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Technology family HC Input type Standard CMOS Output type Push-Pull Supply current (µA) 80 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Features High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Overriding RESET Terminates Output Pulse
  • Triggering from the Leading or Trailing Edge
  • Q and Q\ Buffered Outputs
  • Separate Resets
  • Wide Range of Output-Pulse Widths
  • Schmitt Trigger on B Inputs
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor
  • Overriding RESET Terminates Output Pulse
  • Triggering from the Leading or Trailing Edge
  • Q and Q\ Buffered Outputs
  • Separate Resets
  • Wide Range of Output-Pulse Widths
  • Schmitt Trigger on B Inputs
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

The ’HC221 and CD74HCT221 are dual monostable multivibrators with reset. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the B input occurs at a particular voltage level and is not related to the rise and fall time of the trigger pulse.

Once triggered, the outputs are independent of further trigger inputs on A\ and B. The output pulse can be terminated by a LOW level on the Reset (R)\ pin. Trailing Edge triggering (A)\ and leading-edge-triggering (B) inputs are provided for triggering from either edge of the input pulse. On power up, the IC is reset. If either Mono is not used each input (on the unused device) must be terminated either high or low.

The minimum value of external resistance, RX, is typically 500. The minimum value of external capacitance, CX, is 0pF. The calculation for the pulse width is tW = 0.7 RXCX at VCC = 4.5V.

The ’HC221 and CD74HCT221 are dual monostable multivibrators with reset. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the B input occurs at a particular voltage level and is not related to the rise and fall time of the trigger pulse.

Once triggered, the outputs are independent of further trigger inputs on A\ and B. The output pulse can be terminated by a LOW level on the Reset (R)\ pin. Trailing Edge triggering (A)\ and leading-edge-triggering (B) inputs are provided for triggering from either edge of the input pulse. On power up, the IC is reset. If either Mono is not used each input (on the unused device) must be terminated either high or low.

The minimum value of external resistance, RX, is typically 500. The minimum value of external capacitance, CX, is 0pF. The calculation for the pulse width is tW = 0.7 RXCX at VCC = 4.5V.
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Documentación técnica

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Tipo Título Fecha
* Data sheet CD54HC221, CD74HC221, CD74HCT221 datasheet (Rev. F) 16 oct 2003

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

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