CD74HC4049

Name: CD74HC4049
Brand: TI
SKU: CD74HC4049
Price: 0.157 USD

ACTIVO

Inversores de 6 canales y 2 V a 6 V

Haga su pedido ahora

Hoja de datos

document-pdfAcrobat CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050 datasheet (Rev. I) (Inglés)

CD74HC4049

ACTIVO

Hoja de datos

Haga su pedido ahora

Detalles del producto

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Number of channels

6

IOL (max) (mA)

4

IOH (max) (mA)

-4

Supply current (max) (µA)

40

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, High speed (tpd 10-50ns), Input clamp diode

Rating

Catalog

Operating temperature range (°C)

-55 to 125

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Number of channels

6

IOL (max) (mA)

4

IOH (max) (mA)

-4

Supply current (max) (µA)

40

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, High speed (tpd 10-50ns), Input clamp diode

Rating

Catalog

Operating temperature range (°C)

-55 to 125

PDIP (N)

16

181.42 mm² 19.3 x 9.4

SOIC (D)

16

59.4 mm² 9.9 x 6

SOP (NS)

16

79.56 mm² 10.2 x 7.8

TSSOP (PW)

16

32 mm² 5 x 6.4

Typical Propagation Delay: 6ns at V_CC = 5V, C_L = 15pF, T_A = 25°C
High-to-Low Voltage Level Converter for up to V_I = 16V
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . –55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V

Typical Propagation Delay: 6ns at V_CC = 5V, C_L = 15pF, T_A = 25°C
High-to-Low Voltage Level Converter for up to V_I = 16V
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . –55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V

The ’HC4049 and ’HC4050 are fabricated with high-speed silicon gate technology. They have a modified input protection structure that enables these parts to be used as logic level translators which convert high-level logic to a low-level logic while operating off the low-level logic supply. For example, 15-V input pulse levels can be down-converted to 0-V to 5-V logic levels. The modified input protection structure protects the input from negative electrostatic discharge. These parts also can be used as simple buffers or inverters without level translation. The ’HC4049 and ’HC4050 are enhanced versions of equivalent CMOS types.

filter

Buscar otro/a Búferes y controladores inversores

Descargar Ver vídeo con transcripción Video

Productos similares que pueden interesarle

open-in-new

Comparar alternativas

Misma funcionalidad con diferente configuración de pines que el dispositivo comparado

CD74HC04

ACTIVO

Inversores de 8 canales, 2 V a 6 V Voltage range (2V to 6V), average drive strength (8mA), average propagation delay (20ns)

Documentación técnica

star

=Principal documentación para este producto seleccionada por TI

No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.

Ver todo 14

	Tipo	Título	Fecha
*	Data sheet	CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050 datasheet (Rev. I)	04 feb 2005
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)	26 jul 2021
	Selection guide	Logic Guide (Rev. AB)	12 jun 2017
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	02 dic 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	16 ene 2007
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	08 jul 2004
	User guide	Signal Switch Data Book (Rev. A)	14 nov 2003
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	29 ago 2002
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	01 jun 1997
	Application note	Designing With Logic (Rev. C)	01 jun 1997
	Application note	Input and Output Characteristics of Digital Integrated Circuits	01 oct 1996
	Application note	Live Insertion	01 oct 1996
	Application note	SN54/74HCT CMOS Logic Family Applications and Restrictions	01 may 1996
	Application note	Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc	01 abr 1996

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación (EVM) 14-24-LOGIC-EVM está diseñado para admitir cualquier dispositivo lógico que esté en un empaquetado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

Guía del usuario: PDF | HTML