Inicio Interfaz Circuitos integrados LVDS, M-LVDS y PECL

DS25BR110

ACTIVO

Búfer LVDS de 3.125 Gbps con ecualización de recepción

Detalles del producto

Function Buffer, Equalizer Protocols LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 3125 Input signal CML, LVCMOS, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Buffer, Equalizer Protocols LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 3125 Input signal CML, LVCMOS, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WSON (NGQ) 8 9 mm² 3 x 3
  • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • Four Levels of Receive Equalization Reduce ISI Jitter
  • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space
  • 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

  • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • Four Levels of Receive Equalization Reduce ISI Jitter
  • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space
  • 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

The DS25BR110 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. A fully differential signal path ensures exceptional signal integrity and noise immunity.

The DS25BR110 features four levels of receive equalization (EQ), making it ideal for use as a receiver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count, and further minimize board space.

The DS25BR110 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. A fully differential signal path ensures exceptional signal integrity and noise immunity.

The DS25BR110 features four levels of receive equalization (EQ), making it ideal for use as a receiver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count, and further minimize board space.

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Documentación técnica

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Tipo Título Fecha
* Data sheet DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization datasheet (Rev. E) 14 abr 2013
Application note Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls 29 oct 2020
Application note Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 29 jun 2019
Application note LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A) 29 abr 2013
Application note AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A) 26 abr 2013
User guide 3.125 Gbps LVDS Buffers with Pre-emphasis and Equalization User Guide 25 ene 2012
Application note Extending the Signal Path Over Data Trans Lines Using LVDS Signal Conditioning 02 ago 2007

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

DS25BR100EVK — Búferes LVDS monocanal de 3.125 Gbps con énfasis previo de transmisión y familia de ecualización de

The DS25BR100EVK is an evaluation kit designed for demonstrating performance of the 3.125 Gbps LVDS Single Channel Buffers with Transmit Pre-Emphasis (PE) and Receive Equalization (EQ) family (DS25BR100, DS25BR110 and DS25BR120). The evaluation kit provides all three devices on a single board and (...)

Guía del usuario: PDF
Modelo de simulación

DS25BR110 IBIS Model

SNLM097.ZIP (12 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
WSON (NGQ) 8 Ultra Librarian

Pedidos y calidad

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  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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