Inicio Interfaz Circuitos integrados PCIe, SAS y SATA

DS50PCI402

ACTIVO

Recontrolador PCI Express de 4 carriles y 2.5 Gbps/5.0 Gbps con ecualización y desénfasis

Detalles del producto

Type Redriver Protocols General purpose, PCIe1, PCIe2, sRIO Applications Backplane, Front Port, Peripheral I/O Number of channels 8 Speed (max) (Gbpp) 5 Supply voltage (V) 2.5 Rating Catalog Operating temperature range (°C) -10 to 85
Type Redriver Protocols General purpose, PCIe1, PCIe2, sRIO Applications Backplane, Front Port, Peripheral I/O Number of channels 8 Speed (max) (Gbpp) 5 Supply voltage (V) 2.5 Rating Catalog Operating temperature range (°C) -10 to 85
WQFN (NJY) 54 55 mm² 10 x 5.5
  • Input and Output signal conditioning increases PCIe reach in backplanes and cables
  • 0.09 UI of residual deterministic jitter at 5Gbps after 42” of FR4 (with Input EQ)
  • 0.11 UI of residual deterministic jitter at 5Gbps after 7m of PCIe Cable (with Input EQ)
  • 0.09 UI of residual deterministic jitter at 5Gbps with 28” of FR4 (with Output DE)
  • 0.13 UI of residual deterministic jitter at 5Gbps with 7m of PCIe Cable (with Output DE)
  • Adjustable Transmit VOD 800 to 1200mVp-p
  • Automatic and manual Receiver Detection and input termination control circuitry
  • Automatic power management on an individual lane basis via SMBus
  • Adjustable electrical idle detect threshold.
  • Data rate optimized 3-stage equalization to 27 dB gain
  • Data rate optimized 6-level 0 to 12 dB transmit de-emphasis
  • Flow-thru pinout in 10mmx5.5mm 54-pin leadless WQFN package
  • Single supply operation at 2.5V
  • >6kV HBM ESD rating
  • -10 to 85°C operating temperature range

All trademarks are the property of their respective owners.

  • Input and Output signal conditioning increases PCIe reach in backplanes and cables
  • 0.09 UI of residual deterministic jitter at 5Gbps after 42” of FR4 (with Input EQ)
  • 0.11 UI of residual deterministic jitter at 5Gbps after 7m of PCIe Cable (with Input EQ)
  • 0.09 UI of residual deterministic jitter at 5Gbps with 28” of FR4 (with Output DE)
  • 0.13 UI of residual deterministic jitter at 5Gbps with 7m of PCIe Cable (with Output DE)
  • Adjustable Transmit VOD 800 to 1200mVp-p
  • Automatic and manual Receiver Detection and input termination control circuitry
  • Automatic power management on an individual lane basis via SMBus
  • Adjustable electrical idle detect threshold.
  • Data rate optimized 3-stage equalization to 27 dB gain
  • Data rate optimized 6-level 0 to 12 dB transmit de-emphasis
  • Flow-thru pinout in 10mmx5.5mm 54-pin leadless WQFN package
  • Single supply operation at 2.5V
  • >6kV HBM ESD rating
  • -10 to 85°C operating temperature range

All trademarks are the property of their respective owners.

The DS50PCI402 is a low power, 4 lane bidirectional buffer/equalizer designed specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a system. The receiver is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium.

The transmitter de-emphasis level can be set by the user depending on the distance from the DS50PCI402 to the PCI Express endpoint. The DS50PCI402 contains PCI Express specific functions such as Transmit Idle, RX Detection, and Beacon signal pass through.

The device provides automatic receive detection circuitry which controls the input termination impedance. By automatically reflecting the current load impedance seen on the outputs back to the corresponding inputs the DS50PCI402 becomes completely transparent to both the PCIe root complex and endpoint. An internal rate detection circuit is included to detect if an incoming data stream is at Gen2 data rates, and adjusts the de-emphasis on it's output accordingly. The signal conditioning provided by the device allows systems to upgrade from Gen1 data rates to Gen2 without reducing their physical reach. This is true for FR4 applications such as backplanes, as well as cable interconnect.

The DS50PCI402 is a low power, 4 lane bidirectional buffer/equalizer designed specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a system. The receiver is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium.

The transmitter de-emphasis level can be set by the user depending on the distance from the DS50PCI402 to the PCI Express endpoint. The DS50PCI402 contains PCI Express specific functions such as Transmit Idle, RX Detection, and Beacon signal pass through.

The device provides automatic receive detection circuitry which controls the input termination impedance. By automatically reflecting the current load impedance seen on the outputs back to the corresponding inputs the DS50PCI402 becomes completely transparent to both the PCIe root complex and endpoint. An internal rate detection circuit is included to detect if an incoming data stream is at Gen2 data rates, and adjusts the de-emphasis on it's output accordingly. The signal conditioning provided by the device allows systems to upgrade from Gen1 data rates to Gen2 without reducing their physical reach. This is true for FR4 applications such as backplanes, as well as cable interconnect.

Descargar Ver vídeo con transcripción Video

Documentación técnica

star =Principal documentación para este producto seleccionada por TI
No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 2
Tipo Título Fecha
* Data sheet 2.5 / 5.0 Gbps 4 Lane PCI Express Repeater w/Equalization & De-Emphasis datasheet (Rev. H) 04 mar 2013
User guide DS50PCI401EVK User Guide PCI Express SMA Evaluation Kit 20 feb 2012

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
WQFN (NJY) 54 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

Videos