The DS50PCI402 is a low power, 4 lane bidirectional buffer/equalizer designed
specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive
equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a
system. The receiver is capable of opening an input eye that is completely closed due to
inter-symbol interference (ISI) induced by the interconnect medium.
The transmitter de-emphasis level can be set by the user depending on the distance from
the DS50PCI402 to the PCI Express endpoint. The DS50PCI402 contains PCI Express specific functions
such as Transmit Idle, RX Detection, and Beacon signal pass through.
The device provides automatic receive detection circuitry which controls the input
termination impedance. By automatically reflecting the current load impedance seen on the outputs
back to the corresponding inputs the DS50PCI402 becomes completely transparent to both the PCIe
root complex and endpoint. An internal rate detection circuit is included to detect if an incoming
data stream is at Gen2 data rates, and adjusts the de-emphasis on it's output accordingly. The
signal conditioning provided by the device allows systems to upgrade from Gen1 data rates to Gen2
without reducing their physical reach. This is true for FR4 applications such as backplanes, as
well as cable interconnect.
The DS50PCI402 is a low power, 4 lane bidirectional buffer/equalizer designed
specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive
equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a
system. The receiver is capable of opening an input eye that is completely closed due to
inter-symbol interference (ISI) induced by the interconnect medium.
The transmitter de-emphasis level can be set by the user depending on the distance from
the DS50PCI402 to the PCI Express endpoint. The DS50PCI402 contains PCI Express specific functions
such as Transmit Idle, RX Detection, and Beacon signal pass through.
The device provides automatic receive detection circuitry which controls the input
termination impedance. By automatically reflecting the current load impedance seen on the outputs
back to the corresponding inputs the DS50PCI402 becomes completely transparent to both the PCIe
root complex and endpoint. An internal rate detection circuit is included to detect if an incoming
data stream is at Gen2 data rates, and adjusts the de-emphasis on it's output accordingly. The
signal conditioning provided by the device allows systems to upgrade from Gen1 data rates to Gen2
without reducing their physical reach. This is true for FR4 applications such as backplanes, as
well as cable interconnect.