UCC27519A-Q1
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results:
- Device Automotive Qualified Grade 1: –40°C
to +125°C Ambient Operating Temperature
Range - Device HBM ESD Classification Level 2
- Device CDM ESD Classification Level C6
- Device Automotive Qualified Grade 1: –40°C
- Low-Cost Gate-Driver Device Offering Superior
Replacement of NPN and PNP Discrete Solutions - Pin-to-Pin Compatible With TI’s TPSS2828-Q1
and the TPS2829-Q1 - 4-A Peak Source and 4-A Peak Sink Symmetrical
Drive - Fast Propagation Delays (17-ns typical)
- Fast Rise and Fall Times (8-ns and 7-ns typical)
- 4.5-V to 18-V Single Supply Range
- Outputs Held Low During VDD UVLO (Ensures
Glitch-Free Operation at Power-Up and Power-
Down) - CMOS Input Logic Threshold (Function of Supply
Voltage With Hysteresis) - Hysteretic Logic Thresholds for High Noise
Immunity - EN Pin for Enable Function (Allowed to be no
Connect) - Ability to Support Negative Voltages (–5 V) at
Input and Enable pins - Output Held Low when Input Pins are Floating
- Input Pin Absolute Maximum Voltage Levels Not
Restricted by VDD Pin Bias Supply Voltage - Operating Temperature Range of –40°C to 140°C
- 5-Pin DBV Package (SOT-23)
The UCC2751xA-Q1 single-channel high-speed low-side gate driver devices effectively drive MOSFET and IGBT power switches. With a design that inherently minimizes shoot-through current, the UCC2751xA-Q1 family of devices sources and sinks high, peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 17 ns.
The UCC2751xA-Q1 family of devices provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.
The UCC2751xA-Q1 family of devices operates over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The ability to operate at low voltage levels such as below 5 V, along with best in class switching characteristics, is especially suited for driving emerging wide band-gap power switching devices such as GaN power-semiconductor devices.
The input pin threshold of the UCC2751xA-Q1 family of devices is based on CMOS logic where the threshold voltage is a function of the VDD supply voltage. Typically, the input high threshold (VIN–H) is 55% VDD and the input low threshold (VIN–L) is 39% VDD. Wide hysteresis (16% VDD typically) between the high and low thresholds offers excellent noise immunity and allows users to introduce delays using RC circuits between the input PWM signal and the INx pin of the device.
The UCC2751xA-Q1 family of devices also features a floatable enable function on the EN pin. The EN pin can be left in a no-connect condition, which allows pin-to-pin compatibility between the UCC2751xA-Q1 family of devices and the TPS2828-Q1 or TPS2829-Q1 device, respectively. The enable pin threshold is a fixed voltage threshold and does not vary based on VDD pin bias voltage. Typically, the enable high threshold (VEN-H) is 2.1 V and the enable low threshold (VEN-L) is 1.25 V.
技術資料
設計および開発
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PSPICE-FOR-TI — TI Design / シミュレーション・ツール向け PSpice®
設計とシミュレーション向けの環境である PSpice for TI (...)
| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| SOT-23 (DBV) | 5 | Ultra Librarian |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 使用原材料
- 認定試験結果
- 継続的な信頼性モニタ試験結果
- ファブの拠点
- 組み立てを実施した拠点
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