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Sampling rate (max) (kHz) 192 Rating Automotive Operating temperature range (°C) -40 to 105
Sampling rate (max) (kHz) 192 Rating Automotive Operating temperature range (°C) -40 to 105
TQFP (PFB) 48 81 mm² 9 x 9
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade:
      • DIX4192I-Q1: Grade 3 (–40°C to +85°C)
      • DIX4192T-Q1: Grade 2 (–40°C to +105°C)
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • Digital Audio Interface Transmitter (DIT)
    • PCM/Encoded data to S/PDIF Conversion
    • Supports Sampling Rates Up to 216 kHz
    • Includes Differential Line Driver and
      CMOS-Buffered Outputs
  • Digital Audio Interface Receiver (DIR)
    • S/PDIF to Stereo PCM Conversion / Encoded data
    • PLL Lock Range Includes Sampling Rates from 20 kHz to 216 kHz
    • Four Differential-Input Line Receivers and an Input Multiplexer
    • Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
    • Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
    • Audio CD Q-Channel Sub-Code Decoding and Data Buffer
    • Low Jitter Recovered Clock Output
  • User-Selectable Serial Host Interface: SPI™ or I2C
    • Provides Access to On-Chip Registers and Data Buffers
    • Status Registers and Interrupt Generation for Flag and Error Conditions
    • Block-Sized Data Buffers for Both Channel Status and User Data
  • Two Audio Serial Ports (Ports A and B)
    • Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
    • Slave or Master Mode Operation With Sampling Rates Up to 216 kHz
    • Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats
    • Supports Audio Data Word Lengths Up to
      24 Bits
  • Four General-Purpose Digital Outputs
    • Multifunction Programmable Through Control Registers
  • Extensive Power-Down Support
    • Functional Blocks May Be Disabled Individually When Not In Use
  • Operates From 1.8-V Core and 3.3-V I/O Power Supplies
  • Small TQFP-48 Package, Compatible With the SRC4382 and SRC4392
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade:
      • DIX4192I-Q1: Grade 3 (–40°C to +85°C)
      • DIX4192T-Q1: Grade 2 (–40°C to +105°C)
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • Digital Audio Interface Transmitter (DIT)
    • PCM/Encoded data to S/PDIF Conversion
    • Supports Sampling Rates Up to 216 kHz
    • Includes Differential Line Driver and
      CMOS-Buffered Outputs
  • Digital Audio Interface Receiver (DIR)
    • S/PDIF to Stereo PCM Conversion / Encoded data
    • PLL Lock Range Includes Sampling Rates from 20 kHz to 216 kHz
    • Four Differential-Input Line Receivers and an Input Multiplexer
    • Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
    • Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
    • Audio CD Q-Channel Sub-Code Decoding and Data Buffer
    • Low Jitter Recovered Clock Output
  • User-Selectable Serial Host Interface: SPI™ or I2C
    • Provides Access to On-Chip Registers and Data Buffers
    • Status Registers and Interrupt Generation for Flag and Error Conditions
    • Block-Sized Data Buffers for Both Channel Status and User Data
  • Two Audio Serial Ports (Ports A and B)
    • Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
    • Slave or Master Mode Operation With Sampling Rates Up to 216 kHz
    • Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats
    • Supports Audio Data Word Lengths Up to
      24 Bits
  • Four General-Purpose Digital Outputs
    • Multifunction Programmable Through Control Registers
  • Extensive Power-Down Support
    • Functional Blocks May Be Disabled Individually When Not In Use
  • Operates From 1.8-V Core and 3.3-V I/O Power Supplies
  • Small TQFP-48 Package, Compatible With the SRC4382 and SRC4392

The DIX4192-Q1 device is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The DIX4192-Q1 combines a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports and DIT may be operated at sampling rates up to 216 kHz. The DIR lock range includes sampling rates from 20 kHz to 216 kHz.

The DIX4192-Q1 device is configured using on-chip control registers and data buffers, which are accessed through either a four-wire serial peripheral interface (SPI) port, or a two-wire I2C bus interface. Status registers provide access to a variety of flag and error bits, which are derived from the various function blocks. An open-drain interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options through control register settings. A master reset input pin is provided for initialization by a host processor or supervisory functions.

The DIX4192-Q1 device requires a 1.8-V core logic supply, in addition to a 3.3-V supply for powering portions of the DIR, DIT, and line driver and receiver functions. A separate logic I/O supply supports operation from 1.65 V to 3.6 V, providing compatibility with low-voltage logic interfaces typically found on digital signal processors and programmable logic devices.

The DIX4192-Q1 device is available in a lead-free, TQFP-48 package.

The DIX4192-Q1 device is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The DIX4192-Q1 combines a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports and DIT may be operated at sampling rates up to 216 kHz. The DIR lock range includes sampling rates from 20 kHz to 216 kHz.

The DIX4192-Q1 device is configured using on-chip control registers and data buffers, which are accessed through either a four-wire serial peripheral interface (SPI) port, or a two-wire I2C bus interface. Status registers provide access to a variety of flag and error bits, which are derived from the various function blocks. An open-drain interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options through control register settings. A master reset input pin is provided for initialization by a host processor or supervisory functions.

The DIX4192-Q1 device requires a 1.8-V core logic supply, in addition to a 3.3-V supply for powering portions of the DIR, DIT, and line driver and receiver functions. A separate logic I/O supply supports operation from 1.65 V to 3.6 V, providing compatibility with low-voltage logic interfaces typically found on digital signal processors and programmable logic devices.

The DIX4192-Q1 device is available in a lead-free, TQFP-48 package.

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* Data sheet DIX4192-Q1 Integrated Digital Audio Interface Receiver and Transmitter datasheet (Rev. A) 2016/09/13

설계 및 개발

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평가 보드

DIX4192EVM-PDK — DIX4192 평가 모듈(EVM) 및 USB 마더보드

The DIX4192EVM-PDK provides a modular solution for evaluating the function and performance of the DIX4192 device from Texas Instruments. The PDK includes a motherboard (DAIMB) and a daughterboard (DIX4192EVM). Together, the daughter and mother boards form a modular platform for evaluating the (...)

사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

DIX4192 IBIS Model

SBFM018.ZIP (155 KB) - IBIS Model
시뮬레이션 툴

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TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
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TQFP (PFB) 48 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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