LMH0034
- SMPTE 292M, SMPTE 344M and SMPTE 259M Compliant
- Supports DVB-ASI at 270 Mbps
- Data Rates: 125 Mbps to 1.485 Gbps
- Equalizes up to 200 Meters of Belden 1694A at 1.485 Gbps or up to 400 Meters of Belden 1694A at 270 Mbps
- Manual Bypass, Cable Length Indicator, and Output Mute with a Programmable Threshold
- Single-Ended or Differential Input
- 50Ω Differential Outputs
- Single 3.3V Supply Operation
- 208 mW Typical Power Consumption with 3.3V Supply
- Replaces the GS1524 and GS1524A
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The LMH0034 SMPTE 292M / 259M adaptive cable equalizer is a monolithic integrated circuit for equalizing data transmitted over cable (or any media with similar dispersive loss characteristics). The equalizer operates over a wide range of data rates from 125 Mbps to 1.485 Gbps and supports SMPTE 292M, SMPTE 344M and SMPTE 259M.
The LMH0034 implements DC restoration to correctly handle pathological data conditions. DC restoration can be bypassed for low data rate applications. The equalizer is flexible in allowing either single-ended or differential input drive.
Additional features include a combined carrier detect and output mute pin which mutes the output when no signal is present. A programmable mute reference is used to mute the output at a selectable level of signal degradation. A cable length indicator is provided to determine the amount of cable being equalized.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | LMH0034 SMPTE 292M / 259M Adaptive Cable Equalizer datasheet (Rev. H) | 2013/04/15 | |
Selection guide | Broadcast and Professional Video Interface Solutions (Rev. E) | 2017/04/05 | ||
Application note | AN-1372 LMH0034 PCB Layout Techniques (Rev. B) | 2013/04/26 | ||
Application note | AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) | 2013/04/26 | ||
Application note | AN-2145 Power Considerations for SDI Products (Rev. B) | 2013/04/26 | ||
Application note | AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) | 2013/04/26 | ||
User guide | SD034EVK User's Guide | 2012/06/27 | ||
Application note | High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems | 2009/11/12 | ||
Application note | Timing is Everything Çô The Broadcast Video Signal Path | 2007/08/02 | ||
Design guide | Broadcast Video Owner's Manual | 2006/11/17 |
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패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
SOIC (D) | 16 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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