인터페이스 LVDS, M-LVDS 및 PECL

SN65MLVD201

활성

반이중 M-LVDS 트랜시버

제품 상세 정보

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Low-Voltage Differential 30- Line Drivers and Receivers for Signaling Rates(1) Up to 200 Mbps
  • Type-1 Receivers Incorporate 25 mV of Hysteresis
  • Type-2 Receivers Provide an Offset (100 mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1 V to 3.4 V Common-Mode Voltage Range Allows Data Transfer With 2 V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • 100-Mbps Devices Available (SN65MLVD200A, 202A, 204A, 205A)
  • M-LVDS Bus Power Up/Down Glitch Free
  • APPLICATIONS
    • Low-Power High-Speed Short-Reach
      Alternative to TIA/EIA-485
    • Backplane or Cabled Multipoint Data and Clock Transmission
    • Cellular Base Stations
    • Central-Office Switches
    • Network Switches and Routers

(1) The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

  • Low-Voltage Differential 30- Line Drivers and Receivers for Signaling Rates(1) Up to 200 Mbps
  • Type-1 Receivers Incorporate 25 mV of Hysteresis
  • Type-2 Receivers Provide an Offset (100 mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1 V to 3.4 V Common-Mode Voltage Range Allows Data Transfer With 2 V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • 100-Mbps Devices Available (SN65MLVD200A, 202A, 204A, 205A)
  • M-LVDS Bus Power Up/Down Glitch Free
  • APPLICATIONS
    • Low-Power High-Speed Short-Reach
      Alternative to TIA/EIA-485
    • Backplane or Cabled Multipoint Data and Clock Transmission
    • Cellular Base Stations
    • Central-Office Switches
    • Network Switches and Routers

(1) The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

The SN65MLVD201, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with added features to address multipoint applications. The driver output has been designed to support multipoint buses presenting loads as low as 30 , and incorporates controlled transition times to allow for stubs off of the backbone transmission line.

These devices have Type-1 and Type-2 receivers that detect the bus state with as little as 50 mV of differential input voltage over a common-mode voltage range of –1 V to 3.4 V. The Type-1 receivers exhibit 25 mV of differential input voltage hysteresis to prevent output oscillations with slowly changing signals or loss of input. Type-2 receivers include an offset threshold to provide a known output state under open-circuit, idle-bus, and other faults conditions. The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD201, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with added features to address multipoint applications. The driver output has been designed to support multipoint buses presenting loads as low as 30 , and incorporates controlled transition times to allow for stubs off of the backbone transmission line.

These devices have Type-1 and Type-2 receivers that detect the bus state with as little as 50 mV of differential input voltage over a common-mode voltage range of –1 V to 3.4 V. The Type-1 receivers exhibit 25 mV of differential input voltage hysteresis to prevent output oscillations with slowly changing signals or loss of input. Type-2 receivers include an offset threshold to provide a known output state under open-circuit, idle-bus, and other faults conditions. The devices are characterized for operation from –40°C to 85°C.

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기술 자료

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10개 모두 보기
유형 직함 날짜
* Data sheet Multipoint-LVDS Line Driver and Receiver datasheet (Rev. C) 2008/01/07
Application brief How Far, How Fast Can You Operate MLVDS? 2018/08/06
Application note Introduction to M-LVDS (TIA/EIA-899) (Rev. A) 2013/01/03
User guide Multipoint-Low Voltage Differential Signaling (M-LVDS) EVM (Rev. B) 2004/04/05
Application note M-LVDS Signaling Rate Versus Distance 2003/04/09
Application note Interoperability of M-LVDS and BusLVDS 2003/02/06
User guide 200 Mbps Multipoint-Low Voltage Differential Signaling (M-LVDS) EVM (Rev. A) 2002/12/20
Application note Wired-Logic Signaling with M-LVDS 2002/10/31
User guide Multipoint-Low Voltage Differential Signaling (M-LVDS) Evaluation Module 2002/03/04
Application note TIA/EIA-485 and M-LVDS, Power and Speed Comparison 2002/02/20

설계 및 개발

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평가 보드

MLVD20XBEVM — SN65MLVD203B 및 SN65MLVD204B 전이중 및 반이중 멀티포인트 LVDS(M-LVDS) 평가 모듈

사용 설명서: PDF
TI.com에서 구매 불가
평가 보드

MLVD20XEVM — M-LVDS 평가 모듈

This evaluation module is for the SN65MLVD203B and SN65MLVD204B, which are M-LVDS transceivers.
The SN65MLVD203B is a full-duplex transceiver, and the SN65MLVD204B is a half-duplex transceiver.
사용 설명서: PDF
TI.com에서 구매 불가
평가 보드

SN65MLVD2-3EVM — SN65MLVD2-3EVM 평가 모듈

The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to250 Mbps. Each receiver channel is controlled by a receive enable (/RE). When /RE = low, (...)

사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

SN65MLVD201 IBIS Model (Rev. A)

SLLC117A.ZIP (16 KB) - IBIS Model
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
시뮬레이션 툴

TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
SOIC (D) 8 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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