홈 로직 및 전압 변환 전압 변환기 및 레벨 시프터 방향 제어 전압 변환기
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로직 및 전압 변환
전압 변환기 및 레벨 시프터
방향 제어 전압 변환기

SN74AXCH8T245

활성

8비트 듀얼 공급 버스 트랜시버

지금 주문
데이터 시트

SN74AXCH8T245

활성
데이터 시트 지금 주문

제품 상세 정보

Technology family AXC Applications RGMII Bits (#) 8 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 25 Features Bus-hold, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AXC Applications RGMII Bits (#) 8 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 25 Features Bus-hold, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 24 49.92 mm² 7.8 x 6.4 VQFN (RHL) 24 19.25 mm² 5.5 x 3.5
  • Qualified Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range From 0.65 V to 3.6 V
  • Operating Temperature From –40°C to +125°C
  • Bus-hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
  • Multiple Direction Control Pins to Allow Simultaneous Up and Down Translation
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC Isolation Feature to Effectively Isolate Both Buses in a Power-Down Scenario
  • Partial Power-Down Mode to Limit Backflow Current in a Power-Down Scenario
  • Compatible With SN74AVCH8T245 and 74AVCH8T245 Level Shifters
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Qualified Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range From 0.65 V to 3.6 V
  • Operating Temperature From –40°C to +125°C
  • Bus-hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
  • Multiple Direction Control Pins to Allow Simultaneous Up and Down Translation
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC Isolation Feature to Effectively Isolate Both Buses in a Power-Down Scenario
  • Partial Power-Down Mode to Limit Backflow Current in a Power-Down Scenario
  • Compatible With SN74AVCH8T245 and 74AVCH8T245 Level Shifters
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model
    • 1000-V Charged-Device Model

The SN74AXCH8T245 device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7 V, 0.8 V, and 0.9 V) and devices operating at industry standard voltage nodes (1.8 V, 2.5 V, 3.3 V) and vice versa.

The device operates by using two independent power-supply rails (VCCA and VCCB) . Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH8T245 is compatible with a single-supply system.

The SN74AXCH8T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.

The SN74AXCH8T245 device is designed so the control pins (DIR and OE) are referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pull-up or pull-down resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on all A and B ports respectively, independent of the direction control or output enable.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The VCC isolation feature ensures that if either VCC input supply is below 100 mV, all level shifter outputs are disabled and placed into a high-impedance state. To ensure the high-impedance state of the level shifter I/Os during power up or power down, OE should be tied to VCCA through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74AXCH8T245 device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7 V, 0.8 V, and 0.9 V) and devices operating at industry standard voltage nodes (1.8 V, 2.5 V, 3.3 V) and vice versa.

The device operates by using two independent power-supply rails (VCCA and VCCB) . Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH8T245 is compatible with a single-supply system.

The SN74AXCH8T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.

The SN74AXCH8T245 device is designed so the control pins (DIR and OE) are referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pull-up or pull-down resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on all A and B ports respectively, independent of the direction control or output enable.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The VCC isolation feature ensures that if either VCC input supply is below 100 mV, all level shifter outputs are disabled and placed into a high-impedance state. To ensure the high-impedance state of the level shifter I/Os during power up or power down, OE should be tied to VCCA through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
filter 기타 방향 제어 전압 변환기 찾기
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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
SN74LXCH8T245 활성 8비트 듀얼 공급 버스 트랜시버 - 구성 가능한 전압 변환 및 3상 출력 포함 Supports lower voltages between 0.65V and 3.3V
비교 대상 장치와 유사한 기능
SN74AVCH24T245 활성 구성 가능한 전압 변환 및 3상 출력을 지원하는 24비트 듀얼 공급 버스 트랜시버 Similar function in 24-channel version

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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9개 모두 보기
유형 직함 날짜
* Data sheet SN74AXCH8T245 8-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation, Tri-State Outputs, and Bus-Hold Circuitry datasheet (Rev. A) PDF | HTML 2019/01/07
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024/10/02
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024/07/12
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/07/03
EVM User's guide Generic AVC and LVC Direction Controlled Translation EVM (Rev. B) 2021/07/30
Application note Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) PDF | HTML 2021/03/29
Application note Glitch free power sequencing with AXC level translators (Rev. A) 2018/09/20
Application note An Overview of Bus-Hold Circuit and the Applications (Rev. B) 2018/09/17
User guide SN74AXC8T245 Evaluation Module 2017/08/02

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
평가 보드

14-24-NL-LOGIC-EVM — 14핀~24핀 비 리드 패키지용 로직 제품 일반 평가 모듈

14-24-NL-LOGIC-EVM은 14핀~24핀 BQA, BQB, RGY, RSV, RJW 또는 RHL 패키지가 있는 로직 또는 변환 디바이스를 지원하도록 설계된 유연한 평가 모듈(EVM)입니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
평가 보드

AVCLVCDIRCNTRL-EVM — AVC 및 LVC를 지원하는 방향 제어 양방향 변환 디바이스를 위한 일반 EVM

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)

사용 설명서: PDF
TI.com에서 구매 불가
평가 보드

SN74AXC8T245EVM — 방향 제어 양방향 변환 장치용 SN74AXC8T245 평가 모듈

This EVM is designed to support SN74AXC8T245 which is an 8 channel direction-controlled translation device. There is also option of populating 1, 2, 4 channel LVC and AVC direction controlled translation device. It also supports the bus hold and Q1 devices in the same number of channels. The AXC (...)
사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

SN74AXCH8T245 IBIS Model (Rev. A)

SCEM583A.ZIP (29 KB) - IBIS Model
다운로드
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
TSSOP (PW) 24 Ultra Librarian
VQFN (RHL) 24 Ultra Librarian
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주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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