제품 상세 정보

Technology family LVC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 125 Rating Catalog
Technology family LVC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 125 Rating Catalog
SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 SSOP (DB) 16 48.36 mm² 6.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5 WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • Operate from 1.65V to 3.6V
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 4.6ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)
    • 200V machine model (A115-A)
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • Operate from 1.65V to 3.6V
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 4.6ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)
    • 200V machine model (A115-A)
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

These quadruple 2-line to 1-line data selectors and multiplexers are designed for 1.65V to 3.6V VCC operation.

The SNx4LVC257A devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable ( OE) input is at a high logic level.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V or 5V system environment.

These quadruple 2-line to 1-line data selectors and multiplexers are designed for 1.65V to 3.6V VCC operation.

The SNx4LVC257A devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable ( OE) input is at a high logic level.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V or 5V system environment.

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치보다 업그레이드된 기능을 지원하는 드롭인 대체품
CD74AC257 활성 3상 출력을 지원하는 쿼드 2입력 비인버팅 멀티플렉서 Different voltage range (2V to 6V), longer average propagation delay (7ns)

기술 자료

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27개 모두 보기
유형 직함 날짜
* Data sheet SNx4LVC257A Quadruple 2-Line to 1-Line Data Selectors and Multiplexers With 3-State Outputs datasheet (Rev. P) PDF | HTML 2024/05/08
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Little Logic Guide 2018 (Rev. G) 2018/07/06
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note How to Select Little Logic (Rev. A) 2016/07/26
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Product overview Design Summary for WCSP Little Logic (Rev. B) 2004/11/04
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note Selecting the Right Level Translation Solution (Rev. A) 2004/06/22
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 2003/11/06
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 2002/12/18
Application note Texas Instruments Little Logic Application Report 2002/11/01
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
More literature Standard Linear & Logic for PCs, Servers & Motherboards 2002/06/13
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 2002/05/22
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 2002/05/10
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 2002/03/27
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 1997/12/01
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997/08/01
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note LVC Characterization Information 1996/12/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Design guide Low-Voltage Logic (LVC) Designer's Guide 1996/09/01
Application note Understanding Advanced Bus-Interface Products Design Guide 1996/05/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
평가 보드

14-24-NL-LOGIC-EVM — 14핀~24핀 비 리드 패키지용 로직 제품 일반 평가 모듈

14-24-NL-LOGIC-EVM은 14핀~24핀 BQA, BQB, RGY, RSV, RJW 또는 RHL 패키지가 있는 로직 또는 변환 디바이스를 지원하도록 설계된 유연한 평가 모듈(EVM)입니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
시뮬레이션 모델

SN74LVC257A IBIS Model

SCEM020.ZIP (8 KB) - IBIS Model
시뮬레이션 모델

SN74LVC257A IBIS Model (Rev. A)

SCEM053A.ZIP (41 KB) - IBIS Model
패키지 CAD 기호, 풋프린트 및 3D 모델
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
SSOP (DB) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
VQFN (RGY) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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