SN74LVC2G100-Q1

활성

플립플롭 및 슈미트 트리거 입력을 지원하는 오토모티브 2채널 1.1V~3.6V 구성 가능 게이트

제품 상세 정보

Technology family LVC Supply voltage (min) (V) 1.1 Supply voltage (max) (V) 3.6 Number of channels 2 Inputs per channel 4 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Schmitt-Trigger Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
Technology family LVC Supply voltage (min) (V) 1.1 Supply voltage (max) (V) 3.6 Number of channels 2 Inputs per channel 4 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Schmitt-Trigger Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 16 32 mm² 5 x 6.4 WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • AEC-Q100 qualified for automotive applications:

    • Device temperature grade 1: -40°C to +125°C

    • Device HBM ESD classification level 2

    • Device CDM ESD classification level C4B

  • Available in wettable flank QFN (WBQA) package

  • Operating range from 1.1V to 3.6V
  • 5.5V tolerant input pins
  • Supports standard pinouts
  • Latch-up performance exceeds 250mAper JESD 17
  • ESD protection exceeds JESD 22
    • 2000V Human-Body Model (A114-A)
    • 1000V Charged-Device Model (C101)
  • AEC-Q100 qualified for automotive applications:

    • Device temperature grade 1: -40°C to +125°C

    • Device HBM ESD classification level 2

    • Device CDM ESD classification level C4B

  • Available in wettable flank QFN (WBQA) package

  • Operating range from 1.1V to 3.6V
  • 5.5V tolerant input pins
  • Supports standard pinouts
  • Latch-up performance exceeds 250mAper JESD 17
  • ESD protection exceeds JESD 22
    • 2000V Human-Body Model (A114-A)
    • 1000V Charged-Device Model (C101)

The SN74LVC2G100-Q1 is a dual, sequential, configurable multiple function device with Schmitt Trigger inputs. Sixteen patterns of a 4-bit input determines the output state. The output state serves as the input to a D-Flip Flop, which is transferred to the Q output on the positive going CLK edge. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and non-inverter.

The SN74LVC2G100-Q1 is a dual, sequential, configurable multiple function device with Schmitt Trigger inputs. Sixteen patterns of a 4-bit input determines the output state. The output state serves as the input to a D-Flip Flop, which is transferred to the Q output on the positive going CLK edge. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and non-inverter.

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기술 자료

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27개 모두 보기
유형 직함 날짜
* Data sheet SN74LVC2G100-Q1 Automotive Dual Configurable Multiple-Function Gates with Flip-Flop datasheet (Rev. A) PDF | HTML 2024/04/10
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Little Logic Guide 2018 (Rev. G) 2018/07/06
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note How to Select Little Logic (Rev. A) 2016/07/26
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Product overview Design Summary for WCSP Little Logic (Rev. B) 2004/11/04
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note Selecting the Right Level Translation Solution (Rev. A) 2004/06/22
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 2003/11/06
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 2002/12/18
Application note Texas Instruments Little Logic Application Report 2002/11/01
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
More literature Standard Linear & Logic for PCs, Servers & Motherboards 2002/06/13
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 2002/05/22
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 2002/05/10
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 2002/03/27
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 1997/12/01
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997/08/01
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note LVC Characterization Information 1996/12/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Design guide Low-Voltage Logic (LVC) Designer's Guide 1996/09/01
Application note Understanding Advanced Bus-Interface Products Design Guide 1996/05/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
평가 보드

14-24-NL-LOGIC-EVM — 14핀~24핀 비 리드 패키지용 로직 제품 일반 평가 모듈

14-24-NL-LOGIC-EVM은 14핀~24핀 BQA, BQB, RGY, RSV, RJW 또는 RHL 패키지가 있는 로직 또는 변환 디바이스를 지원하도록 설계된 유연한 평가 모듈(EVM)입니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
시뮬레이션 모델

SN74LVC2G100-Q1 IBIS Model

SBAM510.ZIP (35 KB) - IBIS Model
패키지 CAD 기호, 풋프린트 및 3D 모델
TSSOP (PW) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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