SN74LXC1T45
- Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
- Robust, glitch-free power supply sequencing
- Up to 420-Mbps support for 3.3 V to 5.0 V
- Schmitt-trigger inputs allow for slow or noisy inputs
- I/O’s with integrated dynamic pull-down resistors help reduce external component count
- Control inputs with integrated static pull-down resistors allow for floating control inputs
- High drive strength (up to 32 mA at 5 V)
- Low power consumption
- 3-µA maximum (25°C)
- 6-µA maximum (–40°C to 125°C)
- VCC isolation and Vcc disconnect (Ioff-float) feature
- If either VCC supply is < 100 mV or disconnected, all I/O’s get pulled-down and then become high-impedance
- Ioff supports partial-power-down mode operation
- Compatible with LVC family level shifters
- Control logic (DIR and OE) are referenced to VCCA
- Operating temperature from –40°C to +125°C
- Latch-up performance exceeds 100 mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 4000-V human-body model
- 1000-V charged-device model
The SN74LXC1T45 is a 1-bit, dual-supply noninverting bidirectional voltage level translation device. The I/O pin A and control pin (DIR) are referenced to VCCA logic levels, and the I/O pin B are referenced to VCCB logic levels. The A pin is able to accept I/O voltages ranging from 1.1 V to 5.5 V, while the B pin can accept I/O voltages from 1.1 V to 5.5 V. A high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A. See Device Functional Modes for a summary of the operation of the control logic.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | SN74LXC1T45 Single-Bit Dual-Supply Bus Transceiver With Configurable Level Shifting datasheet (Rev. A) | PDF | HTML | 2021/12/10 |
| Application note | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024/10/02 | |
| Application note | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024/07/12 | |
| Application note | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/07/03 | |
| Application brief | Enabling Power-Efficient FPGA Designs With Level Translation | PDF | HTML | 2024/04/30 | |
| Product overview | Enabling System on Module Industrial PC Connectivity With Level Translation | PDF | HTML | 2023/04/03 | |
| Application brief | Enabling Next Generation Processors, FPGA, and ASSP with Voltage Level Translat | PDF | HTML | 2023/01/17 | |
| Application brief | Enabling LED and LCD Indicators in Modern System Designs | PDF | HTML | 2022/08/01 |
설계 및 개발
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AVCLVCDIRCNTRL-EVM — AVC 및 LVC를 지원하는 방향 제어 양방향 변환 디바이스를 위한 일반 EVM
The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOT-23 (DBV) | 6 | Ultra Librarian |
| SOT-SC70 (DCK) | 6 | Ultra Librarian |
| USON (DRY) | 6 | Ultra Librarian |
| X2SON (DTQ) | 6 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치