TPS51463
- Integrated FETs Converter w/TI Proprietary D-CAP+ Mode Architecture
- Minimum External Parts Count
- Support all MLCC Output Capacitor and SP/POSCAP
- Auto Skip Mode
- Selectable 700-kHz and 1-MHz Frequency
- Small 4 mm × 4 mm, 24-Pin, QFN Package
The TPS51463 is a fully integrated synchronous buck regulator employing D-CAP+™. It is used for up to 5-V step-down where system size is at its premium, performance and optimized BOM are must-haves.
The TPS51463 fully supports the Intel Chief River platform, a ULV/CPU system agent application with integrated 2-bit VID function.
The TPS51463 also features two switching frequency settings (700 kHz and 1 MHz), skip mode, pre-bias startup, programmable external capacitor soft-start time/voltage transition time, output discharge, internal VBST Switch, 2-V reference (±1%), power good and enable.
The TPS51463 is available in a 4 mm × 4 mm, 24-pin, QFN package (Green RoHs compliant and Pb free) and is specified from -40°C to 85°C.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | 3.3-V/5-V Input, D-CAP+™ Mode Synchronous Step-Down Integrated FETs Converter datasheet | 2012/01/26 |
설계 및 개발
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TPS51463 Unencrypted PSpice Transient Model Package (Rev. A)
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
VQFN (RGE) | 24 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치