홈 로직 및 전압 변환 전압 변환기 및 레벨 시프터 자동 방향 전압 변환기
홈
로직 및 전압 변환
전압 변환기 및 레벨 시프터
자동 방향 전압 변환기

TXS0104E

활성

오픈 드레인 및 푸시-풀 애플리케이션을 위한 4비트 양방향 전압 레벨 시프터

지금 주문
데이터 시트

TXS0104E

활성
데이터 시트 지금 주문

제품 상세 정보

Technology family TXS Applications SPIO Bits (#) 4 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 125
Technology family TXS Applications SPIO Bits (#) 4 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 125
DSBGA (YZT) 12 3.9375 mm² 2.25 x 1.75 NFBGA (NMN) 12 5 mm² 2 x 2.5 SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 UQFN (RUT) 12 3.4 mm² 2 x 1.7 VQFN (RGY) 14 12.25 mm² 3.5 x 3.5 WQFN (BQA) 14 7.5 mm² 3 x 2.5
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • Available in the Texas Instruments NanoFree™ package
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V CCA ≤ V CCB)
  • No power-supply sequencing required – V CCA or V CCB can be ramped first
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2000-V Human-Body Model (A114-B)
      • 200-V Machine Model (A115-A)
      • 1000-V Charged-Device Model (C101)
    • B port:
      • 15-kV Human-Body Model (A114-B)
      • 200-V Machine Model (A115-A)
      • 1000-V Charged-Device Model (C101)
  • IEC 61000-4-2 ESD (B port):
    • ±8-kV contact discharge
    • ±10-kV air-gap discharge
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • Available in the Texas Instruments NanoFree™ package
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V CCA ≤ V CCB)
  • No power-supply sequencing required – V CCA or V CCB can be ramped first
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2000-V Human-Body Model (A114-B)
      • 200-V Machine Model (A115-A)
      • 1000-V Charged-Device Model (C101)
    • B port:
      • 15-kV Human-Body Model (A114-B)
      • 200-V Machine Model (A115-A)
      • 1000-V Charged-Device Model (C101)
  • IEC 61000-4-2 ESD (B port):
    • ±8-kV contact discharge
    • ±10-kV air-gap discharge

This 4-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track V CCA. V CCA accepts any supply voltage from 1.65 V to 3.6 V. V CCA must be less than or equal to V CCB. The B port is designed to track V CCB. V CCB accepts any supply voltage from 2.3 V to 5.5 V. This allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104E is designed so that the OE input circuit is supplied by V CCA.

For the high-impedance state during power up or power down, tie OE to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This 4-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track V CCA. V CCA accepts any supply voltage from 1.65 V to 3.6 V. V CCA must be less than or equal to V CCB. The B port is designed to track V CCB. V CCB accepts any supply voltage from 2.3 V to 5.5 V. This allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104E is designed so that the OE input circuit is supplied by V CCA.

For the high-impedance state during power up or power down, tie OE to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
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기술 자료

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13개 모두 보기
유형 직함 날짜
* Data sheet TXS0104E4-Bit Bidirectional Voltage-Level Translator forOpen-Drain and Push-Pull Applications datasheet (Rev. K) PDF | HTML 2023/10/03
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024/07/12
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/07/03
Application brief Integrated vs. Discrete Open Drain Level Translation PDF | HTML 2024/01/09
Application note Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters PDF | HTML 2023/09/29
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 2023/09/05
Application note Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato PDF | HTML 2023/06/28
Application brief Enabling Next Generation Processors, FPGA, and ASSP with Voltage Level Translat PDF | HTML 2023/01/17
Application brief Enabling Smart Solar Inverter Designs with Level Translation PDF | HTML 2022/10/31
EVM User's guide TXS-EVM User's Guide (Rev. B) PDF | HTML 2021/06/08
Selection guide Voltage Translation Buying Guide (Rev. A) 2021/04/15
Application note Effects of pullup and pulldown resistors on TXS and TXB devices (Rev. A) 2018/03/28
Application note A Guide to Voltage Translation With TXS-Type Translators 2010/06/29

설계 및 개발

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평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML
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평가 보드

14-24-NL-LOGIC-EVM — 14핀~24핀 비 리드 패키지용 로직 제품 일반 평가 모듈

14-24-NL-LOGIC-EVM은 14핀~24핀 BQA, BQB, RGY, RSV, RJW 또는 RHL 패키지가 있는 로직 또는 변환 디바이스를 지원하도록 설계된 유연한 평가 모듈(EVM)입니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
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NFBGA (NMN) 12 Ultra Librarian
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
UQFN (RUT) 12 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
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주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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