TXU0202
- Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
- Up to 200 Mbps support for 3.3 V to 5.0 V
- Schmitt-trigger inputs allows for slow and noisy inputs
- Inputs with integrated static pull-down resistors prevent channels from floating
- High drive strength (up to 12 mA at 5 V)
- Low power consumption
- 2.5 µA maximum (25°C)
- 6 µA maximum (–40°C to 125°C)
- VCC isolation and VCC disconnect (Ioff-float) feature
- If either VCC input is <100 mV or disconnected, all outputs are disabled and become high-impedance
- Ioff supports partial-power-down mode operation
- Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
- Pinout compatible with TXB family level shifters
- Available in another variant that supports common applications: TXU0102
- Operating temperature from –40°C to +125°C
- Latch-up performance exceeds 100 mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 2500-V human-body model
- 1500-V charged-device model
TXU0202 is a 2-bit, dual-supply noninverting fixed direction voltage level translation device. Ax pins are referenced to VCCA logic level, OE pin can be referenced to either VCCA or VCCB logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept input voltages ranging from 1.1 V to 5.5 V, while the B port can also accept input voltages from 1.1 V to 5.5 V. Fixed direction data transmission can occur from A to B or B to A when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.
기술 자료
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7개 모두 보기 유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | TXU0202 Dual-Bit Fixed Direction Voltage-Level Translator with Schmitt-Trigger Inputs and 3-State Outputs datasheet (Rev. A) | PDF | HTML | 2022/03/10 |
Application note | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024/10/02 | |
Application note | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024/07/12 | |
Application note | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/07/03 | |
Application brief | Enabling Power-Efficient FPGA Designs With Level Translation | PDF | HTML | 2024/04/30 | |
Application brief | Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages | PDF | HTML | 2023/09/05 | |
Application brief | Enabling Next Generation Wireless Beacons with Level Translation | PDF | HTML | 2022/04/14 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
평가 보드
5-8-LOGIC-EVM — 5핀~8핀 DCK, DCT, DCU, DRL 및 DBV 패키지용 일반 논리 평가 모듈
5~8핀 수의 DCK, DCT, DCU, DRL 또는 DBV 패키지가 있는 모든 디바이스를 지원하도록 설계된 유연한 EVM.
사용 설명서: PDF
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
VSSOP (DCU) | 8 | Ultra Librarian |
X1QFN (DTT) | 8 | Ultra Librarian |
X2SON (DTM) | 8 | Ultra Librarian |
주문 및 품질
포함된 정보:
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
포함된 정보:
- 팹 위치
- 조립 위치