Product details

Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 6 IOL (max) (mA) 40 Supply current (max) (µA) 45000 IOH (max) (mA) 0 Input type Bipolar Output type Open-collector Features High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) 0 to 70
Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 6 IOL (max) (mA) 40 Supply current (max) (µA) 45000 IOH (max) (mA) 0 Input type Bipolar Output type Open-collector Features High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8 SSOP (DB) 14 48.36 mm² 6.2 x 7.8
  • Convert TTL Voltage Levels to MOS Levels
  • High Sink-Current Capability
  • Input Clamping Diodes Simplify
    System Design
  • Open-Collector Driver for Indicator Lamps
    and Relays
  • Convert TTL Voltage Levels to MOS Levels
  • High Sink-Current Capability
  • Input Clamping Diodes Simplify
    System Design
  • Open-Collector Driver for Indicator Lamps
    and Relays

These hex buffers and drivers feature high-voltage open-collector outputs to interface with high-level circuits or for driving high-current loads. They are also characterized for use as buffers for driving TTL inputs. The SN74LS07 devices have a rated output voltage of 30 V. The maximum sink current is 40 mA.

These circuits are compatible with most TTL families. Inputs are diode-clamped to minimize transmission-line effects, which simplifies design. Typical power dissipation is 140 mW, and average propagation delay time is 12 ns.

These hex buffers and drivers feature high-voltage open-collector outputs to interface with high-level circuits or for driving high-current loads. They are also characterized for use as buffers for driving TTL inputs. The SN74LS07 devices have a rated output voltage of 30 V. The maximum sink current is 40 mA.

These circuits are compatible with most TTL families. Inputs are diode-clamped to minimize transmission-line effects, which simplifies design. Typical power dissipation is 140 mW, and average propagation delay time is 12 ns.

Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Pin-for-pin with same functionality to the compared device
SN74AHCT367 ACTIVE 6-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs Lower average drive strength (8mA)

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 10
Type Title Date
* Data sheet SN74LS07 Hex Buffers and Drivers With Open-Collector High-Voltage Outputs datasheet (Rev. D) PDF | HTML 08 Nov 2013
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Designing with the SN54/74LS123 (Rev. A) 01 Mar 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74LS07 Behavioral SPICE Model

SDLM054.ZIP (7 KB) - PSpice Model
Package Pins CAD symbols, footprints & 3D models
PDIP (N) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos