產品詳細資料

Configuration 8:1 Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 40 CON (typ) (pF) 25 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 8 Bandwidth (MHz) 180 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating HiRel Enhanced Product Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 10 Negative rail supply voltage (max) (V) 0
Configuration 8:1 Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 40 CON (typ) (pF) 25 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 8 Bandwidth (MHz) 180 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating HiRel Enhanced Product Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 10 Negative rail supply voltage (max) (V) 0
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Controlled Baseline
    • One Assembly and Test Site, One Fabrication Site
  • Extended Temperature Performance of –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree(1)
  • Wide Analog Input Voltage Range of ±5 V Max
  • Low ON-Resistance
    • 70 Ω Typical (VCC – VEE = 4.5 V)
    • 40 Ω Typical (VCC – VEE = 9 V)
  • Low Crosstalk Between Switches
  • Fast Switching and Propagation Speeds
  • Break-Before-Make Switching
  • Operation Control Voltage = 2 V to 6 V
  • Switch Voltage = 0 V to 10 V
  • High Noise Immunity NIL = 30%, NIH = 30% of VCC,
    VCC = 5 V
  • Controlled Baseline
    • One Assembly and Test Site, One Fabrication Site
  • Extended Temperature Performance of –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree(1)
  • Wide Analog Input Voltage Range of ±5 V Max
  • Low ON-Resistance
    • 70 Ω Typical (VCC – VEE = 4.5 V)
    • 40 Ω Typical (VCC – VEE = 9 V)
  • Low Crosstalk Between Switches
  • Fast Switching and Propagation Speeds
  • Break-Before-Make Switching
  • Operation Control Voltage = 2 V to 6 V
  • Switch Voltage = 0 V to 10 V
  • High Noise Immunity NIL = 30%, NIH = 30% of VCC,
    VCC = 5 V

The CD74HC4051-EP is a digitally controlled analog switch that uses silicon gate CMOS technology to achieve operating speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.

This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply range (that is, VCC to VEE). These bidirectional switches allow the use of any analog input as an output and vice versa. The switches have low ON-resistance and low OFF leakages. In addition, the device has an enable control (E) that, when high, disables all switches to their OFF state.

The CD74HC4051-EP is a digitally controlled analog switch that uses silicon gate CMOS technology to achieve operating speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.

This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply range (that is, VCC to VEE). These bidirectional switches allow the use of any analog input as an output and vice versa. The switches have low ON-resistance and low OFF leakages. In addition, the device has an enable control (E) that, when high, disables all switches to their OFF state.

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類型 標題 日期
* Data sheet CD74HC4051-EP Analog Multiplexer and Demultiplexer datasheet (Rev. A) PDF | HTML 2014年 9月 3日
* VID CD74HC4051-EP VID V6203606 2016年 6月 21日
* Radiation & reliability report CD74HC4051MM96EP Reliability Report 2011年 8月 25日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

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