DP83TC817S-Q1
- IEEE 802.1AE MACsec
- MACsec frame expansion: Inbuilt buffering and flow control support to handle 12 byte IPG Ethernet frames
- Authentication, encryption at line rate
- Cipher suites: GCM-AES-XPN-128/256, GCM-AES-128/256
- Secure Channel: Total 16 SAK enabling 8 Tx/Rx SC
- Auto rollover support for SAK
- Ingress/Egress classification for Ethertype, VLAN, DMAC: up to 8 parallel rules
- Window replay protection
- IEEE 802.1AS time synchronization
- Highly accurate 1pps signal
- Synchronization Jitter: < ±15ns (options to reduce to ±1ns)
- Synchronization Offset: < ±30ns
- Precise time stamping for MACsec encoded PTP packets
- Multiple IOs for event capture and trigger
- Highly accurate 1pps signal
- IEEE 802.3bw, OA 100BASE-T1 and TC-10 compliant
- < 18µA sleep current
- Fast wake from sleep by retaining PHY configuration during sleep (optional)
- Robust EMC Performance
- IEC62228-5, OA EMC compliant
- SAE J2962-3 EMC compliant
- 39dBm DPI Immunity with ±5% assymetry
- <4dBµV radiated emissions in GPS and Glonass bands
- Stripline Emissions: Class-II compliant
- MAC Interfaces: MII, RMII, RGMII, SGMII
- Footprint compatible with TI’s 1000BASE-T1 PHY
- Single board design for 100BASE-T1 and 1000BASE-T1 with required BOM change
- Diagnostic tool kit
- Signal Quality Indication (SQI) & Time Domain Reflectometry (TDR)
- Voltage, Temperature & ESD sensors
- PPM monitor: Provides external clock ppm drift (up to ±100ppb accuracy)
- AEC-Q100 qualified for Automotive Applications:
- Temperature Grade 1: –40°C to +125 °C
- IEC61000-4-2 ESD level 4 MDI: ±8kV CD
The DP83TC817S-Q1 is an IEEE 802.3bw and Open Alliance (OA) compliant automotive qualified 100Base-T1 Ethernet physical layer transceiver. The device provides all physical layer functions needed to transmit and receive data over unshielded/shielded single twisted-pair cables with xMII interface flexibility.
The DP83TC817S-Q1 integrates IEEE 802.1AE line rate security with authentication and optional encryption support to secure communication over the network. The PHY supports up to 16 secure association (SA) channels with automatic SAK rollover and extended packet numbering support. DP83TC817S-Q1 offers ingress classification to filter the unwanted packets & supports WAN MACsec for end-to-end security.
The DP83TC817S-Q1 integrates IEEE802.1AS / IEEE1588v2 to enable highly accurate time synchronization and hardware time stamping for time-sensitive, real-time controlled applications, with support for encrypted PTP packets.
The DP83TC817S-Q1 supports OA TC-10 low power sleep feature with wake forwarding for reduced system power consumption when communication is not required.
The DP83TC817S-Q1 is footprint compatible to TIs 100BASE-T1 PHYs and 1000BASE-T1 PHYs enabling design scalability with a single board for different speeds and features.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | DP83TC817S-Q1 Precise and Secure 100BASE-T1 Automotive Ethernet with IEEE802.1AE MACsec, IEEE802.1AS and TC10 Sleep-Wake datasheet (Rev. A) | PDF | HTML | 2024年 10月 30日 |
Application brief | Advancing Humanoid Robotics with Single Pair Ethernet | PDF | HTML | 2024年 12月 13日 | |
Application note | SGMII Troubleshooting Guide | PDF | HTML | 2024年 11月 5日 | |
Technical article | 具備硬體同步功能的乙太網路 PHY,可擴展車用雷達的涵蓋範 圍 | PDF | HTML | 2024年 7月 5日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TIDA-020072 — 適用於 Jacinto™ 7 處理器的 100/1000Base-T1 汽車乙太網路擴充參考設計
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
VQFN (RHA) | 36 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
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- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
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