DP83TC817S-Q1
- IEEE 802.1AE MACsec
- MACsec frame expansion: Inbuilt buffering and flow control support to handle 12 byte IPG ethernet frames
- Authentication, encryption at line rate
- Cipher suites: GCM-AES-XPN-128/256, GCM-AES-128/256
- Secure Channel: Total 16 SAK enabling 8 Tx/Rx SC
- Auto rollover support for SAK
- Ingress/Egress classification for Ethertype, VLAN, DMAC: up to 8 parallel rules
- Window replay protection
- IEEE 802.1AS time synchronization
- Highly accurate 1pps signal < +/-5 ns
- Precise time stamping for MACsec encoded PTP packets
- Multiple IOs for event capture and trigger
- IEEE 802.3bw & OA 100BASE-T1 compliant
- TC-10 compliant
- < 20µA sleep current
- Fast wake from sleep by retaining PHY configuration during sleep (optional)
- MAC Interfaces: MII, RMII, RGMII, SGMII
- Pin compatible with TI’s 1000BASE-T1 PHY
- Single board design for 100BASE-T1 and 1000BASE-T1 with required BOM change
- Diagnostic tool kit
- Signal Quality Indication (SQI) & Time Domain Reflectometry (TDR)
- Voltage, Temperature & ESD sensors
- AEC-Q100 qualified for Automotive Applications:
- Temperature grade 1: –40°C to +125 °C
The DP83TC817-Q1 device is an IEEE 802.3bw automotive Ethernet physical layer transceiver. The device provides all physical layer functions needed to transmit and receive data, and xMII interface flexibility. DP83TC817-Q1 is compliant to Open Alliance EMC and interoperable specifications over unshielded single twisted-pair cable. DP83TC817-Q1 supports OA TC-10 low power sleep feature with wake forwarding for reduced system power consumption when communication is not required.
The DP83TC817-Q1 integrates IEEE 802.1AE line rate security with authentication and optional encryption support, to secure communication over the network. The PHY supports up to 16 secure association (SA) channels with automatic SAK rollover and extended packet numbering support. DP83TC817-Q1 offers ingress classification to filter the unwanted packets & supports WAN MACsec for end-to-end security.
DP83TC817-Q1 also integrates 1588v2/802.1AS to enable highly accurate time synchronization and hardware timestamping for ADAS applications. DP83TC817-Q1 also offers precise time stamping and synchronization with encrypted PTP packets.
DP83TC817-Q1 is footprint compatible to TIs 100BASE-T1 PHYs and 1000BASE-T1 PHYs enabling design scalability with a single board for different speeds and features.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | DP83TC817-Q1 Precise and Secure 100BASE-T1 Automotive Ethernet with TC10, IEEE802.1AS and IEEE802.1AE MACsec datasheet | PDF | HTML | 2024年 4月 18日 |
Technical article | 具備硬體同步功能的乙太網路 PHY,可擴展車用雷達的涵蓋範 圍 | PDF | HTML | 2024年 7月 5日 |
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