This reference design interfaces with Jacinto™ 7 processor EVM boards through the Serial Ethernet Expansion Connector. Automotive Ethernet connectivity is added through TI's automotive Ethernet PHYs. The design is implemented with TI's DP83TC817S-Q1 100MBit/s single pair Ethernet (SPE) PHY with the option to switch to the DP83TG720S-Q1 SPE PHY for 1000MBit/s operation. A coupling network is used to couple in 12V to the data line.
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Reference design overview and verified performance test data
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Detailed overview of design layout for component placement
Files used for 3D models or 2D drawings of IC components
Design file that contains information on physical board layer of design PCB
PCB layer plot file used for generating PCB design layout
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Design guide | 100/1000Base-T1 Automotive Ethernet Expansion Reference Design for Jacinto™ 7 Processors | PDF | HTML | Sep. 19, 2024 |
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