ESD451
- IEC 61000-4-2 level 4 ESD protection:
- ±30 kV contact discharge
- ±30 kV air gap discharge
- IEC 61000-4-5 surge protection:
- 6.2 A (8/20 µs)
- IO capacitance:
- 0.5 pF (typical)
- DC breakdown voltage: ±8 V (typical)
- Ultra low leakage current: 50 nA (maximum)
- Extremely low ESD clamping voltage
- 10.4 V at 16 A TLP
- R DYN: 0.19 Ω
- Low insertion loss: 3.5 GHz (-3 dB bandwidth)
- Supports high speed interfaces up to 7 Gbps
- Industrial temperature range: –55°C to +150°C
- Space-saving industry standard 0201 footprint (0.6 mm × 0.3 mm × 0.3 mm)
The ESD451 is a bidirectional ESD protection diode for protecting data line and other I/O ports. The ESD451 is rated to dissipate ESD strikes up to ±30 kV per the IEC 61000-4-2 international standard (greater than Level 4).
This device features a 0.5 pF (typical) IO capacitance enabling high-speed interface protection for protocols such as USB 3.0. The extremely low dynamic resistance (0.19 Ω) and clamping voltage (10.4 V at 16 A TLP) is specified for system-level protection against transient events.
The ±30 kV ESD rating and 6.2 A surge provides robust transient protection in a tiny package for protecting 5.5 V power rails and data lines in portable electronics and other space constrained applications such as wearables.
The ESD451 is offered in the industry standard 0201 (DPL) package.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ESD451 1-Channel ±30 kV Bidirectional ESD Diode in an 0201 Package datasheet (Rev. A) | PDF | HTML | 2023年 6月 16日 |
Application note | ESD Packaging and Layout Guide (Rev. B) | PDF | HTML | 2022年 8月 18日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ESDEVM — ESD 評估模組
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
X2SON (DPL) | 2 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。