LF347B

現行

四路、36-V、3-MHz、高電壓轉換率 (13-V/µs)、5-mV 偏移電壓、輸入至 V+、JFET 輸入運算放大器

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TL074H 現行 具有操作溫度 -40°C 至 125°C 的四路、40-V、5-MHz、4-mV 偏移電壓、20-V/µs、輸入至 V+ 運算放大器 Wider temperature range (-40°C to 125°C), lower quiescent current (0.0937 mA), wider voltage range (4.5 V to 40 V), and improved offset voltage drift
TL084H 現行 具有操作溫度 -40°C 至 125°C 的四路、40-V、5.25-MHz、4-mV 偏移電壓、20-V/µs、輸入至 V+ 運算放大器 Wider supply range (4.5 V to 40 V), higher GBW (5.25 MHz), faster slew rate (20 V/us), lower offset voltage (4 mV), lower power (0.9375 mA)

產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 7 Rail-to-rail In to V+ GBW (typ) (MHz) 3 Slew rate (typ) (V/µs) 13 Vos (offset voltage at 25°C) (max) (mV) 5 Iq per channel (typ) (mA) 2 Vn at 1 kHz (typ) (nV√Hz) 18 Rating Catalog Operating temperature range (°C) 0 to 70 Offset drift (typ) (µV/°C) 10 Input bias current (max) (pA) 200 CMRR (typ) (dB) 100 Iout (typ) (A) 0.031 Architecture FET Input common mode headroom (to negative supply) (typ) (V) 3 Input common mode headroom (to positive supply) (typ) (V) 0 Output swing headroom (to negative supply) (typ) (V) 1.5 Output swing headroom (to positive supply) (typ) (V) -1.5
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 7 Rail-to-rail In to V+ GBW (typ) (MHz) 3 Slew rate (typ) (V/µs) 13 Vos (offset voltage at 25°C) (max) (mV) 5 Iq per channel (typ) (mA) 2 Vn at 1 kHz (typ) (nV√Hz) 18 Rating Catalog Operating temperature range (°C) 0 to 70 Offset drift (typ) (µV/°C) 10 Input bias current (max) (pA) 200 CMRR (typ) (dB) 100 Iout (typ) (A) 0.031 Architecture FET Input common mode headroom (to negative supply) (typ) (V) 3 Input common mode headroom (to positive supply) (typ) (V) 0 Output swing headroom (to negative supply) (typ) (V) 1.5 Output swing headroom (to positive supply) (typ) (V) -1.5
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6
  • Low Input Bias Current: 50 pA Typical
  • Low Input Noise Current: 0.01 pA/√Hz Typical
  • Low Total Harmonic Distortion
  • Low Supply Current: 8 mA Typical
  • Gain Bandwidth: 3 MHz Typical
  • High Slew Rate: 13 V/ms Typical
  • Low Input Bias Current: 50 pA Typical
  • Low Input Noise Current: 0.01 pA/√Hz Typical
  • Low Total Harmonic Distortion
  • Low Supply Current: 8 mA Typical
  • Gain Bandwidth: 3 MHz Typical
  • High Slew Rate: 13 V/ms Typical

The LF347 and LF347B devices are low-cost, high-speed, JFET-input operational amplifiers. They require low supply current yet maintain a large gain-bandwidth product and a fast slew rate. In addition, their matched high-voltage JFET inputs provide very low input bias and offset current.

The LF347 and LF347B can be used in applications such as high-speed integrators, digital-to-analog converters, sample-and-hold circuits, and many other circuits.

The LF347 and LF347B devices are characterized for operation from 0°C to 70°C.

The LF347 and LF347B devices are low-cost, high-speed, JFET-input operational amplifiers. They require low supply current yet maintain a large gain-bandwidth product and a fast slew rate. In addition, their matched high-voltage JFET inputs provide very low input bias and offset current.

The LF347 and LF347B can be used in applications such as high-speed integrators, digital-to-analog converters, sample-and-hold circuits, and many other circuits.

The LF347 and LF347B devices are characterized for operation from 0°C to 70°C.

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類型 標題 日期
* Data sheet LF347, LF347B JFET-Input Quad Operational Amplifiers datasheet (Rev. C) PDF | HTML 2016年 3月 31日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日

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開發板

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放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

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使用指南: PDF | HTML
模擬型號

LF347, LF347B PSpice Model

SLOJ038.ZIP (0 KB) - PSpice Model
計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

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設計工具

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設計工具

CIRCUIT060015 — 可調式參考電壓電路

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設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器,若負載電流上升到 1 A 以上,便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時,比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時,讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器,為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用,建議使用具推挽輸出的比較器。
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
PDIP (N) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian

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