LMV342

現行

雙路 5.5-V、1-MHz、高輸出電流 (75-mA) 運算放大器

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TLV9002 現行 適合成本最佳化應用的雙路、5.5-V、1-MHz、RRIO 運算放大器 Better accuracy (1.6mV Vos max), lower power (0.06mA Iq), rail-to-rail inputs and outputs, smaller packages

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Rail-to-rail In to V-, Out GBW (typ) (MHz) 1 Slew rate (typ) (V/µs) 1 Vos (offset voltage at 25°C) (max) (mV) 4 Iq per channel (typ) (mA) 0.107 Vn at 1 kHz (typ) (nV√Hz) 39 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 1.9 Input bias current (max) (pA) 200 CMRR (typ) (dB) 86 Iout (typ) (A) 0.075 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) 0 Input common mode headroom (to positive supply) (typ) (V) -0.8 Output swing headroom (to negative supply) (typ) (V) 0.007 Output swing headroom (to positive supply) (typ) (V) -0.007
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Rail-to-rail In to V-, Out GBW (typ) (MHz) 1 Slew rate (typ) (V/µs) 1 Vos (offset voltage at 25°C) (max) (mV) 4 Iq per channel (typ) (mA) 0.107 Vn at 1 kHz (typ) (nV√Hz) 39 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 1.9 Input bias current (max) (pA) 200 CMRR (typ) (dB) 86 Iout (typ) (A) 0.075 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) 0 Input common mode headroom (to positive supply) (typ) (V) -0.8 Output swing headroom (to negative supply) (typ) (V) 0.007 Output swing headroom (to positive supply) (typ) (V) -0.007
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • 2.7-V and 5-V Performance
  • Rail-to-Rail Output Swing
  • Input Bias Current:1 pA (Typical)
  • Input Offset Voltage: 0.25 mV (Typical)
  • Low Supply Current: 100 µA (Typical)
  • Low Shutdown Current: 45 pA (Typical)
  • Gain Bandwidth of 1 MHz (Typical)
  • Slew Rate: 1 V/µs (Typical)
  • Turnon Time From Shutdown: 5 µs (Typical)
  • Input Referred Voltage Noise (at 10 kHz):
    20 nV/√Hz
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (HBM)
    • 750-V Charged-device model (CDM)
  • 2.7-V and 5-V Performance
  • Rail-to-Rail Output Swing
  • Input Bias Current:1 pA (Typical)
  • Input Offset Voltage: 0.25 mV (Typical)
  • Low Supply Current: 100 µA (Typical)
  • Low Shutdown Current: 45 pA (Typical)
  • Gain Bandwidth of 1 MHz (Typical)
  • Slew Rate: 1 V/µs (Typical)
  • Turnon Time From Shutdown: 5 µs (Typical)
  • Input Referred Voltage Noise (at 10 kHz):
    20 nV/√Hz
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (HBM)
    • 750-V Charged-device model (CDM)

The LMV34x devices are single, dual, and quad CMOS operational amplifiers, respectively, with low voltage, low power, and rail-to-rail output swing capabilities. The PMOS input stage offers an ultra-low input bias current of 1 pA (typical) and an offset voltage of 0.25 mV (typical). The single-supply amplifier is designed specifically for low-voltage (2.7 V to 5 V) operation, with a wide common-mode input voltage range that typically extends from –0.2 V to 0.8 V from the positive supply rail. The LMV341 (single) also offers a shutdown (SHDN) pin that can be used to disable the device. In shutdown mode, the supply current is reduced to 33 nA (typical). Additional features of the family are a 20-nV/√Hz voltage noise at 10 kHz, 1-MHz unity-gain bandwidth, 1-V/µs slew rate, and 100-µA current consumption per channel.

Offered in both the SOT-23 and smaller SC70 packages, the LMV341 is suitable for the most space-constraint applications. The LMV342 dual device is offered in the standard SOIC and VSSOP packages. An extended industrial temperature range from –40°C to 125°C makes these devices suitable in a wide variety of commercial and industrial environments.

The LMV34x devices are single, dual, and quad CMOS operational amplifiers, respectively, with low voltage, low power, and rail-to-rail output swing capabilities. The PMOS input stage offers an ultra-low input bias current of 1 pA (typical) and an offset voltage of 0.25 mV (typical). The single-supply amplifier is designed specifically for low-voltage (2.7 V to 5 V) operation, with a wide common-mode input voltage range that typically extends from –0.2 V to 0.8 V from the positive supply rail. The LMV341 (single) also offers a shutdown (SHDN) pin that can be used to disable the device. In shutdown mode, the supply current is reduced to 33 nA (typical). Additional features of the family are a 20-nV/√Hz voltage noise at 10 kHz, 1-MHz unity-gain bandwidth, 1-V/µs slew rate, and 100-µA current consumption per channel.

Offered in both the SOT-23 and smaller SC70 packages, the LMV341 is suitable for the most space-constraint applications. The LMV342 dual device is offered in the standard SOIC and VSSOP packages. An extended industrial temperature range from –40°C to 125°C makes these devices suitable in a wide variety of commercial and industrial environments.

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類型 標題 日期
* Data sheet LMV34x Rail-to-Rail Output CMOS Operational Amplifiers With Shutdown datasheet (Rev. I) PDF | HTML 2016年 5月 27日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日

設計與開發

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模擬型號

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SLOM481C.ZIP (22 KB) - PSpice Model
模擬型號

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模擬型號

LMV342 TINA-TI Spice Model (Rev. A)

SLOM483A.ZIP (4 KB) - TINA-TI Spice Model
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian

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