產品詳細資料

Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 3.5 CON (typ) (pF) 13 Supply current (typ) (µA) 700 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 3.5 CON (typ) (pF) 13 Supply current (typ) (µA) 700 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4 TVSOP (DGV) 16 23.04 mm² 3.6 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5
  • High-Bandwidth Data Path (Up to 500 MHz) (1)
  • 5-V Tolerant I/Os With Device Powered Up or Powered Down
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4 Ω Typical)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 0.6 mA Typical)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signal Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V and 3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface Bus Isolation, Low-Distortion Signal Gating (1)

(1) For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report CBT-C, CB3T, and CB3Q Signal-Switch Families, (SCDA008).

  • High-Bandwidth Data Path (Up to 500 MHz) (1)
  • 5-V Tolerant I/Os With Device Powered Up or Powered Down
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4 Ω Typical)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 0.6 mA Typical)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signal Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V and 3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface Bus Isolation, Low-Distortion Signal Gating (1)

(1) For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report CBT-C, CB3T, and CB3Q Signal-Switch Families, (SCDA008).

The SN74CB3Q3253 device is a high-bandwidth FET bus switch using a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input and output (I/O) ports.

The SN74CB3Q3253 device is a high-bandwidth FET bus switch using a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input and output (I/O) ports.

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類型 標題 日期
* Data sheet SN74CB3Q3253 Dual 1-of-4 FET Multiplexer – Demultiplexer 2.5-V – 3.3-V Low-Voltage High-Bandwidth Bus Switch datasheet (Rev. C) PDF | HTML 2018年 6月 27日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) PDF | HTML 2021年 11月 19日
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021年 1月 6日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
More literature Digital Bus Switch Selection Guide (Rev. A) 2004年 11月 10日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note Bus FET Switch Solutions for Live Insertion Applications 2003年 2月 7日

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介面轉接器

LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

使用指南: PDF
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介面轉接器

LEADLESS-ADAPTER1 — 用於測試 TI 的 6、8、10、12、14、16 和 20 針腳無引線封裝的表面貼裝至 DIP 接頭適配器

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
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模擬型號

HSPICE MODEL OF SN74CB3Q3253

SCEJ209.ZIP (96 KB) - HSpice Model
模擬型號

SN74CB3Q3253 IBIS Model

SCDM060.ZIP (25 KB) - IBIS Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SSOP (DBQ) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
VQFN (RGY) 16 Ultra Librarian

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