SN74LVC540A

Name: SN74LVC540A
Brand: TI
SKU: SN74LVC540A
Price: 0.254 USD

現行

具有 3 態輸出的 8 通道 1.65-V 至 3.6-V 逆變器

立即訂購

產品規格表

document-pdfAcrobat SNx4LVC540A Octal Buffers/Drivers with 3-State Outputs datasheet (Rev. N) (英文) PDF | HTML

SN74LVC540A

現行

產品規格表

立即訂購

產品詳細資料

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

IOL (max) (mA)

IOH (max) (mA)

-24

Supply current (max) (µA)

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

IOL (max) (mA)

IOH (max) (mA)

-24

Supply current (max) (µA)

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

SOIC (DW)

131.84 mm² 12.8 x 10.3

98.28 mm² 12.6 x 7.8

56.16 mm² 7.2 x 7.8

41.6 mm² 6.5 x 6.4

32 mm² 5 x 6.4

Operate From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 5.3 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V_CC)
I_off Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)
On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

Operate From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 5.3 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V_CC)
I_off Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)
On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

The SN54LVC540A octal buffer/driver is designed for 2.7-V to 3.6-V V_CC operation, and the SN74LVC540A octal buffer/driver is designed for 1.65-V to 3.6-V V_CC operation.

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現行

具有 3 態輸出的 8 通道、0.8-V 至 2.7-V 高速逆變器 Smaller voltage range (0.8V to 2.7V), shorter average propagation delay (1.7ns)

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	類型	標題		日期
*	Data sheet	SNx4LVC540A Octal Buffers/Drivers with 3-State Outputs datasheet (Rev. N)	PDF \| HTML	2014年 6月 5日
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		2021年 7月 26日
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018年 7月 6日
	Selection guide	Logic Guide (Rev. AB)		2017年 6月 12日
	Application note	How to Select Little Logic (Rev. A)		2016年 7月 26日
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015年 12月 2日
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	Application note	Selecting the Right Level Translation Solution (Rev. A)		2004年 6月 22日
	User guide	Signal Switch Data Book (Rev. A)		2003年 11月 14日
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	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		1997年 6月 1日
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	Design guide	Low-Voltage Logic (LVC) Designer's Guide		1996年 9月 1日
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