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放大器
運算放大器 (op amps)
一般用途運算放大器

TL072A

現行

雙路、30-V、3-MHz、高電壓轉換率 (13-V/µs)、6-mV 偏移電壓、輸入至 V+、JFET 輸入運算放大器

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產品規格表

現在提供此產品的更新版本

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TL072H 現行 具有操作溫度 -40°C 至 125°C 的雙路、40-V、5-MHz、4-mV 偏移電壓、20-V/µs、輸入至 V+ 運算放大器 Wider temperature range (-40°C to 125°C), higher slew rate (20 V/us), lower quiescent current (0.0937mA), wider voltage range (4.5 V to 40 V)

TL072A

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 30 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 7 Rail-to-rail In to V+ GBW (typ) (MHz) 3 Slew rate (typ) (V/µs) 13 Vos (offset voltage at 25°C) (max) (mV) 6 Iq per channel (typ) (mA) 1.4 Vn at 1 kHz (typ) (nV√Hz) 37 Rating Catalog Operating temperature range (°C) 0 to 70 Offset drift (typ) (µV/°C) 18 Features Standard Amps Input bias current (max) (pA) 200 CMRR (typ) (dB) 100 Iout (typ) (A) 0.01 Architecture FET Input common mode headroom (to negative supply) (typ) (V) 3 Input common mode headroom (to positive supply) (typ) (V) 0 Output swing headroom (to negative supply) (typ) (V) 1.5 Output swing headroom (to positive supply) (typ) (V) -1.5
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 30 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 7 Rail-to-rail In to V+ GBW (typ) (MHz) 3 Slew rate (typ) (V/µs) 13 Vos (offset voltage at 25°C) (max) (mV) 6 Iq per channel (typ) (mA) 1.4 Vn at 1 kHz (typ) (nV√Hz) 37 Rating Catalog Operating temperature range (°C) 0 to 70 Offset drift (typ) (µV/°C) 18 Features Standard Amps Input bias current (max) (pA) 200 CMRR (typ) (dB) 100 Iout (typ) (A) 0.01 Architecture FET Input common mode headroom (to negative supply) (typ) (V) 3 Input common mode headroom (to positive supply) (typ) (V) 0 Output swing headroom (to negative supply) (typ) (V) 1.5 Output swing headroom (to positive supply) (typ) (V) -1.5
PDIP (P) 8 92.5083 mm² 9.81 x 9.43 SOIC (D) 8 29.4 mm² 4.9 x 6 SOP (PS) 8 48.36 mm² 6.2 x 7.8
  • High slew rate: 20 V/µs (TL07xH, typ)
  • Low offset voltage: 1 mV (TL07xH, typ)
  • Low offset voltage drift: 2 µV/°C
  • Low power consumption: 940 µA/ch (TL07xH, typ)
  • Wide common-mode and differential voltage ranges
    • Common-mode input voltage range includes V CC+
  • Low input bias and offset currents
  • Low noise: V n = 18 nV/√ Hz (typ) at f = 1 kHz
  • Output short-circuit protection
  • Low total harmonic distortion: 0.003% (typ)
  • Wide supply voltage: ±2.25 V to ±20 V, 4.5 V to 40 V
  • High slew rate: 20 V/µs (TL07xH, typ)
  • Low offset voltage: 1 mV (TL07xH, typ)
  • Low offset voltage drift: 2 µV/°C
  • Low power consumption: 940 µA/ch (TL07xH, typ)
  • Wide common-mode and differential voltage ranges
    • Common-mode input voltage range includes V CC+
  • Low input bias and offset currents
  • Low noise: V n = 18 nV/√ Hz (typ) at f = 1 kHz
  • Output short-circuit protection
  • Low total harmonic distortion: 0.003% (typ)
  • Wide supply voltage: ±2.25 V to ±20 V, 4.5 V to 40 V

The TL07xH (TL071H, TL072H, and TL074H) family of devices are the next-generation versions of the industry-standard TL07x (TL071, TL072, and TL074) devices. These devices provide outstanding value for cost-sensitive applications, with features including low offset (1 mV, typical), high slew rate (20 V/µs), and common-mode input to the positive supply. High ESD (1.5 kV, HBM), integrated EMI and RF filters, and operation across the full –40°C to 125°C enable the TL07xH devices to be used in the most rugged and demanding applications.

The TL07xH (TL071H, TL072H, and TL074H) family of devices are the next-generation versions of the industry-standard TL07x (TL071, TL072, and TL074) devices. These devices provide outstanding value for cost-sensitive applications, with features including low offset (1 mV, typical), high slew rate (20 V/µs), and common-mode input to the positive supply. High ESD (1.5 kV, HBM), integrated EMI and RF filters, and operation across the full –40°C to 125°C enable the TL07xH devices to be used in the most rugged and demanding applications.

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類型 標題 日期
* Data sheet TL07xx Low-Noise FET-Input Operational Amplifiers datasheet (Rev. V) PDF | HTML 2023年 4月 12日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件，可測試通用運算放大器 (op amp) 參數，並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項，可滿足封裝需求，使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝，包括：

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
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開發板

DIP-ADAPTER-EVM — DIP 轉接器評估模組

Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.

The (...)

使用指南: PDF
TI.com 無法提供
開發板

DUAL-DIYAMP-EVM — 雙通道通用自製 (DIY) 放大器電路評估模組

The DUAL-DIYAMP-EVM is a unique evaluation module (EVM) family that provides engineers and do it yourselfers (DIYers) with real-world amplifier circuits, enabling you to quickly evaluate design concepts and verify simulations. It is designed specifically for dual package op amps in the (...)
使用指南: PDF
TI.com 無法提供
模擬型號

TL072, TL072A, TL072B PSpice Model

SLOJ067.ZIP (0 KB) - PSpice Model
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計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
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設計工具

CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器

此設計可反轉輸入訊號 VIN，並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
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設計工具

CIRCUIT060015 — 可調式參考電壓電路

此電路結合反相及非反相放大器，讓參考電壓可從負輸入電壓向上調整至輸入電壓。可加入增益以提高最大負參考位準。
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設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器，若負載電流上升到 1 A 以上，便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時，比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時，讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器，為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用，建議使用具推挽輸出的比較器。
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
PDIP (P) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
SOP (PS) 8 Ultra Librarian
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