TL074-EP

現行

強化型產品、四路、30-V、3-MHz、高電壓轉換率 (13-V/µs)、輸入至 V+、JFET 輸入運算放大器

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OPA4991-EP 現行 強化型產品、四路、40-V、4.5-MHz、軌至軌輸入和輸出運算放大器 Rail-to-rail I/O, wider supply range (2.7 V to 40 V), higher gain bandwidth (4.5 MHz), faster slew rate (21 V/µs), lower offset voltage (0.895 mV), lower power (0.56 mA), higher output current (75 mA)

產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 30 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Rail-to-rail In to V+ GBW (typ) (MHz) 3 Slew rate (typ) (V/µs) 13 Vos (offset voltage at 25°C) (max) (mV) 6 Iq per channel (typ) (mA) 1.4 Vn at 1 kHz (typ) (nV√Hz) 18 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125 Offset drift (typ) (µV/°C) 18 Features Standard Amps Input bias current (max) (pA) 200 CMRR (typ) (dB) 100 Iout (typ) (A) 0.01 Architecture FET Input common mode headroom (to negative supply) (typ) (V) 3 Input common mode headroom (to positive supply) (typ) (V) 0 Output swing headroom (to negative supply) (typ) (V) 1.5 Output swing headroom (to positive supply) (typ) (V) -1.5
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 30 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Rail-to-rail In to V+ GBW (typ) (MHz) 3 Slew rate (typ) (V/µs) 13 Vos (offset voltage at 25°C) (max) (mV) 6 Iq per channel (typ) (mA) 1.4 Vn at 1 kHz (typ) (nV√Hz) 18 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125 Offset drift (typ) (µV/°C) 18 Features Standard Amps Input bias current (max) (pA) 200 CMRR (typ) (dB) 100 Iout (typ) (A) 0.01 Architecture FET Input common mode headroom (to negative supply) (typ) (V) 3 Input common mode headroom (to positive supply) (typ) (V) 0 Output swing headroom (to negative supply) (typ) (V) 1.5 Output swing headroom (to positive supply) (typ) (V) -1.5
SOIC (D) 14 51.9 mm² 8.65 x 6
  • Low Power Consumption
  • Wide Common-Mode and Differential Voltage Ranges
  • Low Input Bias and Offset Currents
  • Output Short-Circuit Protection
  • Low Total Harmonic Distortion: 0.003% Typ
  • Low Noise
    Vn = 18 nV/√Hz Typ at f = 1 kHz
  • High Input Impedance: JFET Input Stage
  • Internal Frequency Compensation
  • Latch-Up-Free Operation
  • High Slew Rate: 13 V/μs Typ
  • Common-Mode Input Voltage Range Includes VCC+
  • Low Power Consumption
  • Wide Common-Mode and Differential Voltage Ranges
  • Low Input Bias and Offset Currents
  • Output Short-Circuit Protection
  • Low Total Harmonic Distortion: 0.003% Typ
  • Low Noise
    Vn = 18 nV/√Hz Typ at f = 1 kHz
  • High Input Impedance: JFET Input Stage
  • Internal Frequency Compensation
  • Latch-Up-Free Operation
  • High Slew Rate: 13 V/μs Typ
  • Common-Mode Input Voltage Range Includes VCC+

The JFET-input operational amplifiers in the TL07x is similar to the TL08x series, with low input bias and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL07x ideally suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single monolithic chip.

The TL07x is characterized for operation over the extended temperature range of –40°C to 125°C or military temperature range of –55°C to 125°C.

The JFET-input operational amplifiers in the TL07x is similar to the TL08x series, with low input bias and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL07x ideally suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single monolithic chip.

The TL07x is characterized for operation over the extended temperature range of –40°C to 125°C or military temperature range of –55°C to 125°C.

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類型 標題 日期
* Data sheet Low-Noise, JFET-Input Operational Amplifier datasheet (Rev. F) 2012年 12月 24日
* VID TL074-EP VID V6211621 2016年 6月 21日
* Radiation & reliability report TL074QDREP Reliability Report 2011年 11月 30日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日

設計與開發

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開發板

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放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
設計工具

CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器

此設計可反轉輸入訊號 VIN,並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
設計工具

CIRCUIT060015 — 可調式參考電壓電路

此電路結合反相及非反相放大器,讓參考電壓可從負輸入電壓向上調整至輸入電壓。可加入增益以提高最大負參考位準。
設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器,若負載電流上升到 1 A 以上,便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時,比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時,讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器,為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用,建議使用具推挽輸出的比較器。
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

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使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 14 Ultra Librarian

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  • MSL 等級/回焊峰值
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  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
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