產品詳細資料

Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 3.3 Protocols Analog, I2C, I3C, LVDS, UART Ron (typ) (Ω) 6 CON (typ) (pF) 7.5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 900 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 4.3 Supply voltage (max) (V) 4.3
Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 3.3 Protocols Analog, I2C, I3C, LVDS, UART Ron (typ) (Ω) 6 CON (typ) (pF) 7.5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 900 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 4.3 Supply voltage (max) (V) 4.3
UQFN (RSW) 10 2.52 mm² 1.8 x 1.4 VSSOP (DGS) 10 14.7 mm² 3 x 4.9
  • VCC Operation at 3 V to 4.3 V
  • I/O Pins Can Tolerate up to 5.25 V
  • 1.8-V Compatible Control Logic
  • Supports Powered-off Protection I/O Pins Hi-Z When VCC = 0 V
  • RON = 10 Ω Maximum
  • ΔRON = 0.35 Ω Typical
  • Cio(ON) = 7.5 pF Typical
  • Low Power Consumption (1 uA Maximum)
  • –3-dB Bandwidth = 900 MHz Typical
  • Latch-Up Performance Exceeds
    100 mA Per JESD 78, Class II (1)
  • ESD Performance Tested Per JESD 22
    • 8000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • ESD Performance I/O Port to GND (2)
    • 15000-V Human-Body Model

(1)Except EN and SEL Inputs

(2)High-voltage HBM is performed in addition to the standard HBM testing (A114-B, Class II) and applies to I/O ports tested with respect to GND only.

  • VCC Operation at 3 V to 4.3 V
  • I/O Pins Can Tolerate up to 5.25 V
  • 1.8-V Compatible Control Logic
  • Supports Powered-off Protection I/O Pins Hi-Z When VCC = 0 V
  • RON = 10 Ω Maximum
  • ΔRON = 0.35 Ω Typical
  • Cio(ON) = 7.5 pF Typical
  • Low Power Consumption (1 uA Maximum)
  • –3-dB Bandwidth = 900 MHz Typical
  • Latch-Up Performance Exceeds
    100 mA Per JESD 78, Class II (1)
  • ESD Performance Tested Per JESD 22
    • 8000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • ESD Performance I/O Port to GND (2)
    • 15000-V Human-Body Model

(1)Except EN and SEL Inputs

(2)High-voltage HBM is performed in addition to the standard HBM testing (A114-B, Class II) and applies to I/O ports tested with respect to GND only.

The TMUX154E is a high-bandwidth 2:1 switch specially designed for the switching of high-speed signals in applications with limited I/Os. The wide bandwidth (900 MHz) of this switch allows signals to pass with minimum edge and phase distortion. The switch is bidirectional and offers little or no attenuation of high-speed signals. It is designed for low bit-to-bit skew and high channel-to-channel noise isolation.

The TMUX154E integrates ESD protection cells on all pins, is available in a tiny UQFN package (1.8 mm × 1.4 mm) or a VSSOP package, and is characterized over the free-air temperature range of –40°C to 85°C.

The TMUX154E is a high-bandwidth 2:1 switch specially designed for the switching of high-speed signals in applications with limited I/Os. The wide bandwidth (900 MHz) of this switch allows signals to pass with minimum edge and phase distortion. The switch is bidirectional and offers little or no attenuation of high-speed signals. It is designed for low bit-to-bit skew and high channel-to-channel noise isolation.

The TMUX154E integrates ESD protection cells on all pins, is available in a tiny UQFN package (1.8 mm × 1.4 mm) or a VSSOP package, and is characterized over the free-air temperature range of –40°C to 85°C.

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類型 標題 日期
* Data sheet TMUX154E ESD-Protected, Low Capacitance, 2-Channel, 2:1 Switch, With Powered-off Protection datasheet PDF | HTML 2018年 2月 6日
Product overview How to Support Two Controllers on the I2C Bus, Avoid Bus Contention, and Prevent Controller Failures PDF | HTML 2024年 11月 27日
Application brief Important Multiplexer Characteristics for I3C Applications PDF | HTML 2023年 7月 27日
Application brief Best Practices: I2C Devices on an I3C Shared Bus PDF | HTML 2023年 3月 30日
Application brief 1.8-V Logic for Multiplexers and Signal Switches (Rev. C) PDF | HTML 2022年 7月 26日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021年 1月 6日
Technical article Roll with the design punches and overcome power-sequencing challenges PDF | HTML 2019年 7月 29日
Application brief Improve Stability Issues with Low Con Multiplexers (Rev. A) 2018年 12月 10日

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介面轉接器

LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

使用指南: PDF
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介面轉接器

LEADLESS-ADAPTER1 — 用於測試 TI 的 6、8、10、12、14、16 和 20 針腳無引線封裝的表面貼裝至 DIP 接頭適配器

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
使用指南: PDF
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模擬型號

TMUX154E TINA-TI Reference Design

SCDM178.TSC (409 KB) - TINA-TI Reference Design
模擬型號

TMUX154E TINA-TI Spice Model

SCDM179.ZIP (5 KB) - TINA-TI Spice Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
UQFN (RSW) 10 Ultra Librarian
VSSOP (DGS) 10 Ultra Librarian

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