TMUX7212M
- Latch-up immune
- Dual supply range: ±4.5V to ±22 V
- Single supply range: 4.5V to 44 V
- –55°C to +125°C operating temperature
- Low on-resistance: 2Ω
- High current support: 220mA (maximum)
- 1.8V logic compatible
- Integrated pull-down resistor on logic pins
- Fail-safe logic
- Rail-to-rail operation
- Bidirectional operation
The TMUX7212M is a complementary metal-oxide semiconductor (CMOS) switch with four independently selectable 1:1, single-pole, single-throw (SPST) switch channels. The devices work with a single supply (4.5V to 44 V), dual supplies (±4.5V to ±22 V), or asymmetric supplies (such as VDD = 12 V, VSS = –5V). The TMUX7212M supports bidirectional analog and digital signals on the source (Sx) and drain (Dx) pins ranging from VSS to VDD.
Each switch of the TMUX7212M is controlled with appropriate logic control inputs on the SELx pins. The TMUX7212M is part of the precision switches and multiplexers family of devices and have very low on and off leakage currents allowing them to be used in high precision measurement applications.
The TMUX7212M provides latch-up immunity, preventing undesirable high current events between parasitic structures within the device typically caused by overvoltage events. A latch-up condition typically continues until the power supply rails are turned off and can lead to device failure. The latch-up immunity feature allows the TMUX7212M family of switches and multiplexers to be used in harsh environments. Additionally, the TMUX7212M is rated for extended temperature use down to –55°C, making it an excellent choice for harsh industrial and aerospace applications.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TMUX7212M 44 V , Low-RON, 1:1 (SPST), 4-Channel Precision Switches with Latch-Up Immunity and 1.8-V Logic datasheet | PDF | HTML | 2024年 1月 8日 |
設計與開發
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TMUX721XEVM — TMUX721x PW 封裝評估模組
TMUX721xEVM 支援採用 16 針腳 TSSOP (PW) 封裝的 TMUX721x 裝置評估,包括 TMUX7211PWR、TMUX7212PWR 和 TMUX7213PWR。此評估模組可用於快速進行專為 DC 和時序參數之 TMUX721x 裝置的原型設計及測試。
LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
LEADLESS-ADAPTER1 — 用於測試 TI 的 6、8、10、12、14、16 和 20 針腳無引線封裝的表面貼裝至 DIP 接頭適配器
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
TSSOP (PW) | 16 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。