TPD3F303
- Bidirectional EMI Filtering and Line Termination
With Integrated ESD Protection- –3-dB Bandwidth 300 MHz
- IEC 61000-4-2 Level 4 ESD Protection
- ±15-kV Contact Discharge
- ±15-kV Air Gap Discharge
- DC Breakdown Voltage: 6 V (Minimum)
- Low Leakage Current: 0.1 µA (Maximum)
- Low Noise C-R-C Filter Topology
- Integrated VCC Clamp Eliminates the Need for
External ESD Protection - Space-Saving DPV (0.5-mm Pitch), DQD
Packages (0.4-mm Pitch)
The TPD3F303 device is a highly-integrated device that provides a three-channel Electromagnetic Interference (EMI) filter and a Transient Voltage Suppressor (TVS) based ESD protection diode array. The C-R-C based low-pass filter provides EMI protection for the data, clock, and reset lines of a SIM Card interface. Furthermore, the four-channel TVS Diode array provides IEC 61000-4-2 level 4 ESD protection for the previously mentioned signals (data, clock, reset) and the VCC power line. The TPD3F303 contains a 47-Ω termination resistor for the clock line and 100-Ω termination resistor for both the data and reset lines. The high level of integration offered by the TPD3F303 makes the device well-suited for applications like cell phones, tablets, hotspots, and PDAs.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPD3F303 ESD Protection and EMI Filter for SIM Card Interface datasheet (Rev. A) | PDF | HTML | 2016年 4月 27日 |
User guide | Reading and Understanding an ESD Protection Data Sheet (Rev. A) | PDF | HTML | 2023年 9月 19日 | |
Application note | ESD Packaging and Layout Guide (Rev. B) | PDF | HTML | 2022年 8月 18日 | |
Analog Design Journal | Design Considerations for System-Level ESD Circuit Protection | 2012年 9月 25日 |
設計與開發
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ESDEVM — ESD 評估模組
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
USON (DPV) | 8 | Ultra Librarian |
WSON (DQD) | 8 | Ultra Librarian |
訂購與品質
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