TPS3106
- Precision Supply Voltage Supervision Range:
0.9 V, 1.2 V, 1.5 V, 1.6 V, 2 V, and 3.3 V - High Trip-Point Accuracy: 0.75%
- Supply Current of 1.2 µA (Typical)
- RESET Defined With Input Voltages as Low as 0.4 V
- Power-On Reset Generator With a Delay Time of 130 ms
- Push/Pull or Open-Drain RESET Outputs
- Package Temperature Range: –40°C to 125°C
The TPS310x and TPS311x families of supervisory circuits provide circuit initialization and timing supervision, primarily for DSP and processor-based systems.
During power-on, RESET is asserted low when the supply voltage (VDD) becomes higher than 0.4 V. Thereafter, the supervisory circuit monitors VDD and keeps the RESET output low as long as VDD remains below the threshold voltage (VIT–). To ensure proper system reset, after VDD surpasses the threshold voltage, an internal timer delays the transition of the RESET signal from low to high for the specified time. When VDD drops below VIT–, the output transitions low again.
All the devices of this family have a fixed-sense threshold voltage (VIT–) set by an internal voltage divider.
The TPS3103 and TPS3106 devices have an active-low, open-drain RESET output and either an integrated power-fail input (PFI) or SENSE input with corresponding outputs for monitoring other voltages. The TPS3110 has an active-low push/pull RESET and a watchdog timer to monitor the operation of microprocessors. All three devices have a manual reset pin that can be used to force the outputs low regardless of the sensed voltages.
The product spectrum is designed for supply voltages of 0.9 V up to 3.6 V. The circuits are available in 6-pin SOT-23 packages. The TPS31xx family is characterized for operation over a temperature range of –40°C to 125°C.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPS31xx Ultralow Supply-Current Voltage Monitor With Optional Watchdog datasheet (Rev. G) | PDF | HTML | 2016年 9月 28日 |
Selection guide | Voltage Supervisors (Reset ICs) Quick Reference Guide (Rev. H) | 2020年 2月 28日 | ||
E-book | Voltage Supervisor and Reset ICs: Tips, Tricks and Basics | 2019年 6月 28日 | ||
Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
Design guide | High-Availability Industrial High-Speed Counter Pulse Train Output Design Guide | 2015年 6月 15日 | ||
Application note | Choosing an Appropriate Pull-up/Pull-down Resistor for Open Drain Outputs | 2011年 9月 19日 |
設計與開發
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High Availability High Speed Counter and Pulse Train Output Assembly Drawing
High Availability High Speed Counter and Pulse Train Output CAD Files
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOT-23 (DBV) | 6 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點