TPS65192
- 9-Channel Level Shifter Supports 6 × CLK, VST, ODD, and EVEN Signals
- Organized as Two Groups of 7 + 2 Channels
- Separate Positive Supplies (VGHX) for Each Group
- VGHX Levels up to 38V
- VGL Levels Down to -13V
- Panel DISCHARGE Function
- Suitable for 4-Phase and 6-Phase Applications
- Gate Voltage Shaping on Channels 1 to 6
- Supports Single and Multiple Flicker Clocks
- Peak Output Currents greater than 500mA
- 28-Pin 5×5 mm QFN Package
- APPLICATIONS
- LCD Displays Using Gate-in-Panel (GIP) Technology
The TPS65192 is a 9 channel level-shifter intended for use in LCD display applications such as TVs and monitors. The device converts the logic-level signals generated by the Timing Controller (T-CON) to the high-level signals used by the display panel.
The 9 level shifter channels are organized as two groups. Channels 1 through 7 are powered from VGH1 and VGL, and channels 8 and 9 are powered from VGH2 and VGL. Each level-shifter channel features low impedance output stages that achieve fast rise and fall times even when driving the capacitive loading typically present in LCD display applications.
Level shifter channels 1 through 6 support gate voltage shaping, which can be used to improve picture quality by reducing image sticking. Novel decoding logic enables a single flicker clock signal to control gate voltage shaping for all CLK channels without the need for synchronization. The device also supports the use of multiple flicker clocks. The rate of decay is set by an external resistor or resistor network connected to the RE pin.
A tenth level shifter channel specially configured with a comparator input stage allows designers to implement panel discharging during power-down.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | 9 Channel Level Shifter with Gate Voltage Shaping and Discharge Functions datasheet | 2009年 7月 15日 | |
| Application note | Understanding Undervoltage Lockout in Power Devices (Rev. A) | 2018年 9月 19日 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
| Application note | TPS6519x Power Dissipation Estimation in Typical Level Shifter Application | 2015年 12月 8日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHD) | 28 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。