TPS65642
- 2.6 V to 6 V Input Voltage Range
- Synchronous Boost Converter (AVDD)
- Non-Synchronous Boost Converter with Temperature
Compensation (VGH) - Synchronous Buck Converter (VCORE)
- Synchronous Buck Converter (VIO1)
- Low Dropout Linear Regulator (VIO2)
- Programmable VCOM Calibrator with
Two Integrated Buffer Amplifiers - Gate Voltage Shaping
- Panel Discharge Signal (XAO)
- System Reset Signal (RST)
- 14-Channel, 10-Bit Programmable Gamma Voltage Correction
- On-Chip EEPROM with Write Protect
- I2C™ Interface
- Thermal Shutdown
- Supports GIP and Non-GIP Displays
- 56-Ball, 3.16 mm × 3.45 mm 0.4 mm Pitch DSBGA
The TPS65642 is a compact LCD bias solution primarily intended for use in Notebook and Tablet PCs. The device comprises two boost converters to supply the LCD panels source driver and gate driver/level shifter; two buck converters and an LDO linear regulator to supply the systems logic voltages; a programmable VCOM generator with two high-speed amplifiers; 14-channel gamma voltage correction; and a gate voltage shaping function.
技術文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 7 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | LCD Bias with Integrated Gamma Reference for Notebook PCs, Tablet PCs datasheet | 2013年 7月 19日 | |
Application note | Basic Calculation of a Boost Converter's Power Stage (Rev. D) | PDF | HTML | 2022年 10月 28日 | |
Application note | Understanding Undervoltage Lockout in Power Devices (Rev. A) | 2018年 9月 19日 | ||
Technical article | Display Power: Why TFT LCD needs Temperature Compensation | PDF | HTML | 2017年 7月 26日 | |
Application note | How to Generate a Regulated VGL Supply Using the TPS65642A | 2016年 12月 8日 | ||
Application note | Basic Calculation of a Buck Converter's Power Stage (Rev. B) | 2015年 8月 17日 | ||
Application note | Minimizing Ringing at the Switch Node of a Boost Converter | 2006年 9月 15日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
DSBGA (YFF) | 56 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點