TS5A12301E
- Low ON-State Resistance (0.75 Ω)
- Low Charge Injection
- Excellent ON-State Resistance Matching
- Isolation in Power-Down Mode, VCC = 0
- Specified Break-Before-Make Switching
- 2.25-V to 5.5-V Power Supply (VCC)
- 6-MΩ Input Pulldown Allows Control Input (IN) to Be Unconnected
- 1.8-V Compatible Control Input Threshold Independent of VCC
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 3000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
- ESD Performance COM Port to GND
- 8000-V Human-Body Model (A114-B, Class II)
- ±8-kV Contact Discharge (IEC 61000-4-2)
- ±15-kV Air-Gap Discharge (IEC 61000-4-2)
- APPLICATIONS
- Cell Phones
- PDAs
- Portable Instrumentation
- MP3 Players
- Portable Media Players
All other trademarks are the property of their respective owners
The TS5A12301E device is a bidirectional, 1-channel, single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device offers a low ON-state resistance with excellent channel-to-channel ON-state resistance matching and the break-before-make feature to prevent signal distortion during the transferring of a signal from one path to another.
The device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications. The control input (IN) pin can be connected to low-voltage GPIOs, allowing it to be controlled by 1.8-V signals.
The TS5A12301E has ±15-kV air-gap discharge and ±8-kV contact discharge ESD protection for the COM port to GND, which makes it compliant with the IEC Level 4 ESD standard (IEC 61000-4-2).
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TS5A12301E IEC Level 4 ESD-protected 0.75-Ω SPDT Analog Switch With 1.8-V Compatible Input Logic datasheet (Rev. C) | PDF | HTML | 2016年 12月 23日 |
Application note | High-Efficiency Charging for TWS Using a 2-Pin Interface Application Report (Rev. A) | PDF | HTML | 2023年 5月 16日 | |
Application brief | 1.8-V Logic for Multiplexers and Signal Switches (Rev. C) | PDF | HTML | 2022年 7月 26日 | |
Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022年 6月 2日 | |
Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021年 12月 1日 | |
Application brief | Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) | PDF | HTML | 2021年 1月 6日 | |
Application note | Preventing Excess Power Consumption on Analog Switches | 2008年 7月 3日 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 |
設計與開發
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
DSBGA (YFP) | 6 | Ultra Librarian |
訂購與品質
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