TS5A22362
- Specified break-before-make switching
- Negative signaling capability: maximum swing from –2.75 V to 2.75 V (VCC = 2.75 V)
- Low ON-state resistance (0.65 Ω typical)
- Low charge injection
- Excellent ON-state resistance matching
- 2.3-V to 5.5-V Power supply (VCC)
- Latch-Up performance exceeds 100 mA Per JESD 78, Class II
- ESD Performance tested per JESD 22
- 2500-V Human-body model
(A114-B, class II) - 1500-V Charged-device model (C101)
- 200-V Machine model (A115-A)
- 2500-V Human-body model
The TS5A22362 is a bidirectional, 2-channel single-pole double-throw (SPDT) analog switch designed to operate from 2.3 V to 5.5 V. The device features negative signal swing capability that allows signals below ground to pass through the switch without distortion. The break-before-make feature prevents signal distortion during the transferring of a signal from one path to another. Low ON-state resistance, excellent channel-to-channel ON-state resistance matching, and minimal total harmonic distortion (THD) performance are ideal for audio applications. The 3.00 mm × 3.00 mm DRC package is also available as a nonmagnetic package for medical imaging application.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TS5A22362 0.65-Ω 2-channel SPDT Analog Switches With Negative Signaling Capability datasheet (Rev. E) | PDF | HTML | 2019年 9月 25日 |
Application brief | 1.8-V Logic for Multiplexers and Signal Switches (Rev. C) | PDF | HTML | 2022年 7月 26日 | |
Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022年 6月 2日 | |
Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021年 12月 1日 | |
Application note | Preventing Excess Power Consumption on Analog Switches | 2008年 7月 3日 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 |
設計與開發
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LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
LEADLESS-ADAPTER1 — 用於測試 TI 的 6、8、10、12、14、16 和 20 針腳無引線封裝的表面貼裝至 DIP 接頭適配器
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
DSBGA (YZP) | 10 | Ultra Librarian |
VSON (DRC) | 10 | Ultra Librarian |
VSSOP (DGS) | 10 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
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