TS5N214

現行

10-V、4:1、2 通道 FET 匯流排開關

立即訂購

產品規格表

document-pdfAcrobat TS5N214 datasheet (英文)

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TS5N214

現行

產品規格表

立即訂購

產品詳細資料

Configuration

4:1

Number of channels

2

Power supply voltage - single (V)

5

Protocols

Analog

Ron (typ) (Ω)

3

CON (typ) (pF)

100

Supply current (typ) (µA)

10

Bandwidth (MHz)

25

Operating temperature range (°C)

-40 to 85

Features

Supports input voltage beyond supply

Input/output continuous current (max) (mA)

100

Rating

Catalog

Drain supply voltage (max) (V)

5.25

Supply voltage (max) (V)

5.25

Configuration

4:1

Number of channels

2

Power supply voltage - single (V)

5

Protocols

Analog

Ron (typ) (Ω)

3

CON (typ) (pF)

100

Supply current (typ) (µA)

10

Bandwidth (MHz)

25

Operating temperature range (°C)

-40 to 85

Features

Supports input voltage beyond supply

Input/output continuous current (max) (mA)

100

Rating

Catalog

Drain supply voltage (max) (V)

5.25

Supply voltage (max) (V)

5.25

SSOP (DBQ)

16

29.4 mm² 4.9 x 6

TSSOP (PW)

16

32 mm² 5 x 6.4

Low and Flat ON-State Resistance (r_on) Characteristics Over Operating Range (r_on = 3 Typ)
0- to 10-V Switching on Data I/O Ports
Bidirectional Data Flow With Near-Zero Propagation Delay
Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C_io(OFF) = 20 pF Max, B Port)
V_CC Operating Range From 4.75 V to 5.25 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
  (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

Low and Flat ON-State Resistance (r_on) Characteristics Over Operating Range (r_on = 3 Typ)
0- to 10-V Switching on Data I/O Ports
Bidirectional Data Flow With Near-Zero Propagation Delay
Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C_io(OFF) = 20 pF Max, B Port)
V_CC Operating Range From 4.75 V to 5.25 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
  (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

The TS5N214 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (r_on). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distorion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N214 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The TS5N214 is a 2-bit 1-of-4 multiplexer/demultiplexer with separate output-enable (1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The TS5N214 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (r_on). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distorion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N214 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The TS5N214 is a 2-bit 1-of-4 multiplexer/demultiplexer with separate output-enable (1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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